Found in review of the common-stage-independence refactor.
Three branches in the hottest conversion loop (src/common/m_variables_conversion.fpp:595, 658, 721) changed from compile-time #ifdef to runtime reads of device-resident module scalars: enforce_density_floor_vc, preserve_qbmm_number_vc, lagrange_beta_index_vc (declared and GPU_DECLAREd at lines 39-42, assigned at 287-290).
Correctness is fine. The concern is performance: this branch already took a 3x AMD OpenMP-offload regression from exactly this shape — see 89c25e3c ("Keep the working-direction mapping in simulation"), which moved dir_idx/dir_flg back out of common for this reason.
A build gate will not catch it. Suggested check: a wall-clock comparison on the AMD OpenMP-offload lane against master before merging, since that is the configuration where the previous instance of this pattern showed up.
Found in review of the
common-stage-independencerefactor.Three branches in the hottest conversion loop (
src/common/m_variables_conversion.fpp:595, 658, 721) changed from compile-time#ifdefto runtime reads of device-resident module scalars:enforce_density_floor_vc,preserve_qbmm_number_vc,lagrange_beta_index_vc(declared andGPU_DECLAREd at lines 39-42, assigned at 287-290).Correctness is fine. The concern is performance: this branch already took a 3x AMD OpenMP-offload regression from exactly this shape — see
89c25e3c("Keep the working-direction mapping in simulation"), which moveddir_idx/dir_flgback out of common for this reason.A build gate will not catch it. Suggested check: a wall-clock comparison on the AMD OpenMP-offload lane against master before merging, since that is the configuration where the previous instance of this pattern showed up.