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Op descriptions across the DXSA dialect are written in noticeably different styles. The spec documents instructions inconsistently, and
that inconsistency has leaked into our .td files. We should agree on a single convention and apply it dialect-wide.
Description: Bitwise and.
Operation: Component-wise logical AND of each pair of 32-bit values from src0 and src1. 32-bit results placed in dest.
Open questions to decide
Formula vs prose vs both for ops.
Operand order/direction: descriptions don't say which operand is the destination vs the sources (raised by @hvdijk in [mlir][dxsa] Add and instruction #167). Do we state it explicitly, or rely on the $dst, $lhs, $rhs convention?
(Raised by @hvdijk in #167.)
Problem
Op descriptions across the DXSA dialect are written in noticeably different styles. The spec documents instructions inconsistently, and
that inconsistency has leaked into our
.tdfiles. We should agree on a single convention and apply it dialect-wide.Examples of the current divergence
22.10.1 add
22.11.1 and
Open questions to decide
$dst, $lhs, $rhsconvention?