diff --git a/arch/arm/src/stm32h5/CMakeLists.txt b/arch/arm/src/stm32h5/CMakeLists.txt index 9055fb57db2c3..e604d929520ba 100644 --- a/arch/arm/src/stm32h5/CMakeLists.txt +++ b/arch/arm/src/stm32h5/CMakeLists.txt @@ -124,6 +124,10 @@ if(CONFIG_STM32_IWDG) list(APPEND SRCS stm32_iwdg.c) endif() +if(CONFIG_ARM_MPU) + list(APPEND SRCS stm32_mpuinit.c) +endif() + # Required chip type specific files if(CONFIG_STM32_STM32H5XXXX) diff --git a/arch/arm/src/stm32h5/Make.defs b/arch/arm/src/stm32h5/Make.defs index d401ea56d7d15..b8cc3930ab9ca 100644 --- a/arch/arm/src/stm32h5/Make.defs +++ b/arch/arm/src/stm32h5/Make.defs @@ -127,6 +127,10 @@ ifeq ($(CONFIG_STM32_IWDG),y) CHIP_CSRCS += stm32_iwdg.c endif +ifeq ($(CONFIG_ARM_MPU),y) +CHIP_CSRCS += stm32_mpuinit.c +endif + ifeq ($(CONFIG_STM32_WWDG),y) CHIP_CSRCS += stm32_wwdg.c endif diff --git a/arch/arm/src/stm32h5/hardware/stm32h5xxx_memorymap.h b/arch/arm/src/stm32h5/hardware/stm32h5xxx_memorymap.h index ea0bc9e05ff2a..d36327ea3d231 100644 --- a/arch/arm/src/stm32h5/hardware/stm32h5xxx_memorymap.h +++ b/arch/arm/src/stm32h5/hardware/stm32h5xxx_memorymap.h @@ -60,6 +60,7 @@ /* System Memory Addresses **************************************************/ #define STM32_SYSMEM_MEM 0x0bf80000 +#define STM32_OTP_BASE 0x08FFF000 /* One-Time Programmable (OTP) memory base address */ #define STM32_SYSMEM_UID 0x08FFF800 /* The 96-bit unique device identifier */ #define STM32_SYSMEM_FSIZE 0x08FFF80C /* Size of Flash memory in Kbytes. */ #define STM32_SYSMEM_PACKAGE 0x08FFF80E /* Indicates the device's package type. */ diff --git a/arch/arm/src/stm32h5/stm32_mpuinit.c b/arch/arm/src/stm32h5/stm32_mpuinit.c new file mode 100644 index 0000000000000..ba98332269cfb --- /dev/null +++ b/arch/arm/src/stm32h5/stm32_mpuinit.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * arch/arm/src/stm32h5/stm32_mpuinit.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "mpu.h" +#include "stm32_mpuinit.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_mpuinitialize + * + * Description: + * Configure the MPU. + * + * For FLAT build: + * - just reset and enable the MPU with the default background region. + * + ****************************************************************************/ + +void stm32_mpuinitialize(void) +{ + /* Show MPU information */ + + mpu_showtype(); + + /* Reset the MPU in case a bootloader left it configured */ + + mpu_reset(); + + /* Then enable the MPU */ + + mpu_control(true, false, true); +} diff --git a/arch/arm/src/stm32h5/stm32_mpuinit.h b/arch/arm/src/stm32h5/stm32_mpuinit.h new file mode 100644 index 0000000000000..fc1cba96cdc8f --- /dev/null +++ b/arch/arm/src/stm32h5/stm32_mpuinit.h @@ -0,0 +1,53 @@ +/**************************************************************************** + * arch/arm/src/stm32h5/stm32_mpuinit.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32H5_STM32_MPUINIT_H +#define __ARCH_ARM_SRC_STM32H5_STM32_MPUINIT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_mpuinitialize + * + * Description: + * Configure the MPU. + * + * For FLAT build: + * - just reset and enable the MPU with the default background region. + * + ****************************************************************************/ + +#ifdef CONFIG_ARM_MPU +void stm32_mpuinitialize(void); +#else +# define stm32_mpuinitialize() +#endif + +#endif /* __ARCH_ARM_SRC_STM32H5_STM32_MPUINIT_H */ diff --git a/arch/arm/src/stm32h5/stm32_start.c b/arch/arm/src/stm32h5/stm32_start.c index 62acdd78f69f7..d5384b05172c0 100644 --- a/arch/arm/src/stm32h5/stm32_start.c +++ b/arch/arm/src/stm32h5/stm32_start.c @@ -40,6 +40,10 @@ #include "stm32_gpio.h" #include "stm32_start.h" +#ifdef CONFIG_ARM_MPU +# include "stm32_mpuinit.h" +#endif + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -220,6 +224,15 @@ void __start(void) #endif showprogress('B'); + /* Configure the MPU to permit user-space access to its FLASH and RAM (for + * CONFIG_BUILD_PROTECTED) or to manage cache properties of external + * memory regions (in a flat build). + */ + +#ifdef CONFIG_ARM_MPU + stm32_mpuinitialize(); +#endif + /* Initialize onboard resources */ stm32_board_initialize(); diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/CMakeLists.txt b/boards/arm/stm32h5/nucleo-h563zi/src/CMakeLists.txt index 75c0d6d997b11..e6816c82f3246 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/CMakeLists.txt +++ b/boards/arm/stm32h5/nucleo-h563zi/src/CMakeLists.txt @@ -52,6 +52,10 @@ if(CONFIG_STM32_USBFS_HOST) list(APPEND SRCS stm32_usb.c) endif() +if(CONFIG_ARM_MPU) + list(APPEND SRCS stm32_mpu.c) +endif() + target_sources(board PRIVATE ${SRCS}) set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld") diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs b/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs index 828ce6c96c142..e51b1e73344a7 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs +++ b/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs @@ -58,6 +58,10 @@ ifeq ($(CONFIG_STM32_USBFS_HOST),y) CSRCS += stm32_usb.c endif +ifeq ($(CONFIG_ARM_MPU),y) +CSRCS += stm32_mpu.c +endif + DEPPATH += --dep-path board VPATH += :board CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h b/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h index 7bbc2507f827e..a19be1144ae83 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h +++ b/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h @@ -115,6 +115,18 @@ int stm32_bringup(void); +/**************************************************************************** + * Name: stm32_mpu_configure_otp + * + * Description: + * Initialize MPU and configure the OTP flash region. + * + ****************************************************************************/ + +#if defined(CONFIG_ARM_MPU) && defined(CONFIG_STM32_ICACHE) +void stm32_mpu_configure_otp(void); +#endif + #ifdef CONFIG_STM32_SPI /**************************************************************************** * Name: stm32_spiregister diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/stm32_boot.c b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_boot.c index a0674b6132916..9d33312fb5984 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/stm32_boot.c +++ b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_boot.c @@ -53,6 +53,12 @@ void stm32_board_initialize(void) { +#if defined(CONFIG_ARM_MPU) && defined(CONFIG_STM32_ICACHE) + /* Configure OTP MPU region. */ + + stm32_mpu_configure_otp(); +#endif + #ifdef CONFIG_ARCH_LEDS /* Configure on-board LEDs if LED support has been selected. */ diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/stm32_mpu.c b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_mpu.c new file mode 100644 index 0000000000000..3ac2d4f0e3ec0 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_mpu.c @@ -0,0 +1,41 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h563zi/src/stm32_mpu.c + * + * SPDX-License-Identifier: Apache-2.0 + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "hardware/stm32_memorymap.h" +#include "mpu.h" +#include "stm32_mpuinit.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_mpu_configure_otp + * + * Description: + * Configure the OTP flash region as non-cacheable, non-executable, non- + * shareable, and read-only. + * + ****************************************************************************/ + +void stm32_mpu_configure_otp(void) +{ + mpu_configure_region(STM32_OTP_BASE, 4096, + MPU_RBAR_XN | MPU_RBAR_SH_NO | MPU_RBAR_AP_RORO, + MPU_RLAR_NONCACHEABLE); +}