From 00c1666e053982c8a9cff86eee080b3806ad5d95 Mon Sep 17 00:00:00 2001 From: Andrew Gaul Date: Thu, 27 Aug 2026 11:40:53 -0700 Subject: [PATCH] AArch64: SYSL writes its Rt operand, it does not read it SYSL was generated with CS_AC_READ on Rt, but Rt is the destination. "SYSL , #, , {, #}" is the system instruction WITH RESULT, and the Arm ARM names Xt "the 64-bit name of the general-purpose destination register", encoded in the Rt field. Before: sysl x0, #0, c0, c0, #0 operands[0].type: REG = x0 operands[0].access: READ Registers read: x0 After: sysl x0, #0, c0, c0, #0 operands[0].type: REG = x0 operands[0].access: WRITE Registers modified: x0 A consumer tracking register liveness saw a use where there is a definition, which is the unsafe direction: a value written into Xt looked like it was still needed. SYS (without the L) is the opposite direction -- its Xt is a source, and it takes it as the last operand -- and is already CS_AC_READ; it is untouched. --- arch/AArch64/AArch64GenCSMappingInsnOp.inc | 2 +- tests/details/aarch64.yaml | 12 ++++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/AArch64/AArch64GenCSMappingInsnOp.inc b/arch/AArch64/AArch64GenCSMappingInsnOp.inc index 1c03340534..0f3556bc68 100644 --- a/arch/AArch64/AArch64GenCSMappingInsnOp.inc +++ b/arch/AArch64/AArch64GenCSMappingInsnOp.inc @@ -46762,7 +46762,7 @@ }}, { /* AARCH64_SYSLxt (7060) - AARCH64_INS_SYSL - sysl $Rt, $op1, $Cn, $Cm, $op2 */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* Rt */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* Rt */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* op1 */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Cn */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Cm */ diff --git a/tests/details/aarch64.yaml b/tests/details/aarch64.yaml index 4b0086dcda..f11791ca03 100644 --- a/tests/details/aarch64.yaml +++ b/tests/details/aarch64.yaml @@ -1800,3 +1800,15 @@ test_cases: mem_disp: 1 access: CS_AC_WRITE regs_read: [ b10, x8 ] + - + input: + bytes: [0x00,0x00,0x28,0xd5] + arch: "CS_ARCH_AARCH64" + options: [ CS_OPT_DETAIL ] + address: 0x0 + expected: + insns: + - + asm_text: "sysl x0, #0, c0, c0, #0" + details: + regs_write: [ x0 ]