From 8e728f74d5d4de4f599daa8c2b0b90e87fbd04a9 Mon Sep 17 00:00:00 2001 From: Andy Ayers Date: Wed, 24 Jun 2026 12:34:29 -0700 Subject: [PATCH] [arm64] Emit cmlt/cmle/fcmlt/fcmle for compares against zero Contain a zero vector operand for CompareLessThan/CompareLessThanOrEqual so the JIT emits the 'less than [or equal to] zero' forms instead of materializing zero and swapping operands. Fixes #64785. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> --- src/coreclr/jit/hwintrinsiccodegenarm64.cpp | 46 +++- src/coreclr/jit/hwintrinsiclistarm64.h | 12 +- src/coreclr/jit/lowerarmarch.cpp | 17 ++ .../JitBlue/Runtime_33972/Runtime_33972.cs | 210 ++++++++++++++++++ 4 files changed, 273 insertions(+), 12 deletions(-) diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index 6255e64de4173d..c5b48bb72524d7 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -1362,18 +1362,52 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) GetEmitter()->emitIns_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, opt); break; - case NI_AdvSimd_AbsoluteCompareLessThan: - case NI_AdvSimd_AbsoluteCompareLessThanOrEqual: case NI_AdvSimd_CompareLessThan: case NI_AdvSimd_CompareLessThanOrEqual: - case NI_AdvSimd_Arm64_AbsoluteCompareLessThan: - case NI_AdvSimd_Arm64_AbsoluteCompareLessThanScalar: - case NI_AdvSimd_Arm64_AbsoluteCompareLessThanOrEqual: - case NI_AdvSimd_Arm64_AbsoluteCompareLessThanOrEqualScalar: case NI_AdvSimd_Arm64_CompareLessThan: case NI_AdvSimd_Arm64_CompareLessThanScalar: case NI_AdvSimd_Arm64_CompareLessThanOrEqual: case NI_AdvSimd_Arm64_CompareLessThanOrEqualScalar: + // If the second operand is a contained zero, we can emit the + // 'less than [or equal to] zero' form directly instead of + // materializing a zero vector and swapping the operands. + if (intrin.op2->isContained()) + { + assert(intrin.op2->IsVectorZero()); + + instruction zeroIns = INS_invalid; + switch (ins) + { + case INS_cmgt: + zeroIns = INS_cmlt; + break; + case INS_cmge: + zeroIns = INS_cmle; + break; + case INS_fcmgt: + zeroIns = INS_fcmlt; + break; + case INS_fcmge: + zeroIns = INS_fcmle; + break; + default: + unreached(); + } + + GetEmitter()->emitIns_R_R(zeroIns, emitSize, targetReg, op1Reg, opt); + } + else + { + GetEmitter()->emitIns_R_R_R(ins, emitSize, targetReg, op2Reg, op1Reg, opt); + } + break; + + case NI_AdvSimd_AbsoluteCompareLessThan: + case NI_AdvSimd_AbsoluteCompareLessThanOrEqual: + case NI_AdvSimd_Arm64_AbsoluteCompareLessThan: + case NI_AdvSimd_Arm64_AbsoluteCompareLessThanScalar: + case NI_AdvSimd_Arm64_AbsoluteCompareLessThanOrEqual: + case NI_AdvSimd_Arm64_AbsoluteCompareLessThanOrEqualScalar: GetEmitter()->emitIns_R_R_R(ins, emitSize, targetReg, op2Reg, op1Reg, opt); break; diff --git a/src/coreclr/jit/hwintrinsiclistarm64.h b/src/coreclr/jit/hwintrinsiclistarm64.h index 0511e289400069..f722cce8825136 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64.h +++ b/src/coreclr/jit/hwintrinsiclistarm64.h @@ -352,8 +352,8 @@ HARDWARE_INTRINSIC(AdvSimd, CeilingScalar, HARDWARE_INTRINSIC(AdvSimd, CompareEqual, -1, 2, {INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_invalid, INS_invalid, INS_fcmeq, INS_invalid}, HW_Category_SIMD, HW_Flag_Commutative|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) HARDWARE_INTRINSIC(AdvSimd, CompareGreaterThan, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SIMD, HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) HARDWARE_INTRINSIC(AdvSimd, CompareGreaterThanOrEqual, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SIMD, HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) -HARDWARE_INTRINSIC(AdvSimd, CompareLessThan, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd, CompareLessThanOrEqual, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) +HARDWARE_INTRINSIC(AdvSimd, CompareLessThan, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) +HARDWARE_INTRINSIC(AdvSimd, CompareLessThanOrEqual, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) HARDWARE_INTRINSIC(AdvSimd, CompareTest, -1, 2, {INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_invalid, INS_invalid, INS_cmtst, INS_invalid}, HW_Category_SIMD, HW_Flag_Commutative) HARDWARE_INTRINSIC(AdvSimd, ConvertToInt32RoundAwayFromZero, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fcvtas, INS_invalid}, HW_Category_SIMD, HW_Flag_BaseTypeFromFirstArg) HARDWARE_INTRINSIC(AdvSimd, ConvertToInt32RoundAwayFromZeroScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fcvtas, INS_invalid}, HW_Category_SIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SIMDScalar) @@ -622,10 +622,10 @@ HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThan, HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SIMD, HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMD, HW_Flag_SIMDScalar|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMD, HW_Flag_SIMDScalar|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) -HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_invalid, INS_fcmgt}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMD, HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMD, HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen) +HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_invalid, INS_fcmgt}, HW_Category_SIMD, HW_Flag_SpecialCodeGen|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) +HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SIMD, HW_Flag_SpecialCodeGen|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) +HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMD, HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) +HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMD, HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SupportsContainment|HW_Flag_CanBenefitFromConstantProp) HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareTest, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmtst, INS_cmtst, INS_invalid, INS_cmtst}, HW_Category_SIMD, HW_Flag_Commutative) HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareTestScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmtst, INS_cmtst, INS_invalid, INS_cmtst}, HW_Category_SIMD, HW_Flag_Commutative|HW_Flag_SIMDScalar) HARDWARE_INTRINSIC(AdvSimd_Arm64, ConvertToDouble, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_scvtf, INS_ucvtf, INS_fcvtl, INS_invalid}, HW_Category_SIMD, HW_Flag_BaseTypeFromFirstArg) diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp index d0ef0b68627d5c..f4f926d417c9ca 100644 --- a/src/coreclr/jit/lowerarmarch.cpp +++ b/src/coreclr/jit/lowerarmarch.cpp @@ -3844,6 +3844,23 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node) break; } + case NI_AdvSimd_CompareLessThan: + case NI_AdvSimd_CompareLessThanOrEqual: + case NI_AdvSimd_Arm64_CompareLessThan: + case NI_AdvSimd_Arm64_CompareLessThanOrEqual: + case NI_AdvSimd_Arm64_CompareLessThanScalar: + case NI_AdvSimd_Arm64_CompareLessThanOrEqualScalar: + { + // Containment is not supported for unsigned base types as there is no + // 'less than [or equal to] zero' form; comparing an unsigned value to zero + // would require the two-operand cmhi/cmhs instructions. + if (intrin.op2->IsVectorZero() && !varTypeIsUnsigned(intrin.baseType)) + { + MakeSrcContained(node, intrin.op2); + } + break; + } + case NI_Vector64_CreateScalarUnsafe: case NI_Vector128_CreateScalarUnsafe: case NI_AdvSimd_DuplicateToVector64: diff --git a/src/tests/JIT/Regression/JitBlue/Runtime_33972/Runtime_33972.cs b/src/tests/JIT/Regression/JitBlue/Runtime_33972/Runtime_33972.cs index c503442ee12329..6f217ce4030bd0 100644 --- a/src/tests/JIT/Regression/JitBlue/Runtime_33972/Runtime_33972.cs +++ b/src/tests/JIT/Regression/JitBlue/Runtime_33972/Runtime_33972.cs @@ -534,6 +534,108 @@ static Vector64 AdvSimd_Arm64_CompareGreaterThanOrEqualScalar_Vector64_Int return AdvSimd.Arm64.CompareGreaterThanOrEqualScalar(left, Vector64.Zero); } + // CompareLessThan + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector64 AdvSimd_CompareLessThan_Vector64_Single_Zero(Vector64 left) + { + // ARM64-FULL-LINE: fcmlt v0.2s, v0.2s, #0.0 + return AdvSimd.CompareLessThan(left, Vector64.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_CompareLessThan_Vector128_Single_Zero(Vector128 left) + { + // ARM64-FULL-LINE: fcmlt v0.4s, v0.4s, #0.0 + return AdvSimd.CompareLessThan(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_CompareLessThan_Vector128_Int32_Zero(Vector128 left) + { + // ARM64-FULL-LINE: cmlt v0.4s, v0.4s, #0 + return AdvSimd.CompareLessThan(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_Arm64_CompareLessThan_Vector128_Double_Zero(Vector128 left) + { + // ARM64-FULL-LINE: fcmlt v0.2d, v0.2d, #0.0 + return AdvSimd.Arm64.CompareLessThan(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_Arm64_CompareLessThan_Vector128_Int64_Zero(Vector128 left) + { + // ARM64-FULL-LINE: cmlt v0.2d, v0.2d, #0 + return AdvSimd.Arm64.CompareLessThan(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector64 AdvSimd_Arm64_CompareLessThanScalar_Vector64_Double_Zero(Vector64 left) + { + // ARM64-FULL-LINE: fcmlt d0, d0, #0.0 + return AdvSimd.Arm64.CompareLessThanScalar(left, Vector64.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector64 AdvSimd_Arm64_CompareLessThanScalar_Vector64_Int64_Zero(Vector64 left) + { + // ARM64-FULL-LINE: cmlt d0, d0, #0 + return AdvSimd.Arm64.CompareLessThanScalar(left, Vector64.Zero); + } + + // CompareLessThanOrEqual + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector64 AdvSimd_CompareLessThanOrEqual_Vector64_Single_Zero(Vector64 left) + { + // ARM64-FULL-LINE: fcmle v0.2s, v0.2s, #0.0 + return AdvSimd.CompareLessThanOrEqual(left, Vector64.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_CompareLessThanOrEqual_Vector128_Single_Zero(Vector128 left) + { + // ARM64-FULL-LINE: fcmle v0.4s, v0.4s, #0.0 + return AdvSimd.CompareLessThanOrEqual(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_CompareLessThanOrEqual_Vector128_Int32_Zero(Vector128 left) + { + // ARM64-FULL-LINE: cmle v0.4s, v0.4s, #0 + return AdvSimd.CompareLessThanOrEqual(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_Arm64_CompareLessThanOrEqual_Vector128_Double_Zero(Vector128 left) + { + // ARM64-FULL-LINE: fcmle v0.2d, v0.2d, #0.0 + return AdvSimd.Arm64.CompareLessThanOrEqual(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector128 AdvSimd_Arm64_CompareLessThanOrEqual_Vector128_Int64_Zero(Vector128 left) + { + // ARM64-FULL-LINE: cmle v0.2d, v0.2d, #0 + return AdvSimd.Arm64.CompareLessThanOrEqual(left, Vector128.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector64 AdvSimd_Arm64_CompareLessThanOrEqualScalar_Vector64_Double_Zero(Vector64 left) + { + // ARM64-FULL-LINE: fcmle d0, d0, #0.0 + return AdvSimd.Arm64.CompareLessThanOrEqualScalar(left, Vector64.Zero); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + static Vector64 AdvSimd_Arm64_CompareLessThanOrEqualScalar_Vector64_Int64_Zero(Vector64 left) + { + // ARM64-FULL-LINE: cmle d0, d0, #0 + return AdvSimd.Arm64.CompareLessThanOrEqualScalar(left, Vector64.Zero); + } + // Validation unsafe static bool ValidateResult_Vector64(Vector64 result, T expectedElementValue) where T : unmanaged @@ -788,6 +890,50 @@ static int Tests_AdvSimd() // End CompareGreaterThanOrEqual Tests + // Begin CompareLessThan Tests + + if (!ValidateResult_Vector64(AdvSimd_CompareLessThan_Vector64_Single_Zero(Vector64.Create(-1f)), Single.NaN)) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_CompareLessThan_Vector64_Single_Zero(Vector64.One), 0f)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThan_Vector128_Single_Zero(Vector128.Create(-1f)), Single.NaN)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThan_Vector128_Single_Zero(Vector128.One), 0f)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThan_Vector128_Int32_Zero(Vector128.Create(-1)), -1)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThan_Vector128_Int32_Zero(Vector128.One), 0)) + result = -1; + + // End CompareLessThan Tests + + // Begin CompareLessThanOrEqual Tests + + if (!ValidateResult_Vector64(AdvSimd_CompareLessThanOrEqual_Vector64_Single_Zero(Vector64.Zero), Single.NaN)) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_CompareLessThanOrEqual_Vector64_Single_Zero(Vector64.One), 0f)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThanOrEqual_Vector128_Single_Zero(Vector128.Zero), Single.NaN)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThanOrEqual_Vector128_Single_Zero(Vector128.One), 0f)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThanOrEqual_Vector128_Int32_Zero(Vector128.Zero), -1)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_CompareLessThanOrEqual_Vector128_Int32_Zero(Vector128.One), 0)) + result = -1; + + // End CompareLessThanOrEqual Tests + return result; } @@ -884,6 +1030,70 @@ static int Tests_AdvSimd_Arm64() // End CompareEqual Tests + // Begin CompareLessThan Tests + + // Vector128 + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThan_Vector128_Double_Zero(Vector128.Create(-1.0)), Double.NaN)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThan_Vector128_Double_Zero(Vector128.One), 0.0)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThan_Vector128_Int64_Zero(Vector128.Create(-1L)), -1L)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThan_Vector128_Int64_Zero(Vector128.One), 0L)) + result = -1; + + // Vector64 (scalar) + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanScalar_Vector64_Double_Zero(Vector64.CreateScalar(-1.0)), Vector64.CreateScalar(Double.NaN))) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanScalar_Vector64_Double_Zero(Vector64.CreateScalar(1.0)), 0.0)) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanScalar_Vector64_Int64_Zero(Vector64.CreateScalar(-1L)), Vector64.CreateScalar(-1L))) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanScalar_Vector64_Int64_Zero(Vector64.CreateScalar(1L)), 0L)) + result = -1; + + // End CompareLessThan Tests + + // Begin CompareLessThanOrEqual Tests + + // Vector128 + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThanOrEqual_Vector128_Double_Zero(Vector128.Zero), Double.NaN)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThanOrEqual_Vector128_Double_Zero(Vector128.One), 0.0)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThanOrEqual_Vector128_Int64_Zero(Vector128.Zero), -1L)) + result = -1; + + if (!ValidateResult_Vector128(AdvSimd_Arm64_CompareLessThanOrEqual_Vector128_Int64_Zero(Vector128.One), 0L)) + result = -1; + + // Vector64 (scalar) + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanOrEqualScalar_Vector64_Double_Zero(Vector64.Zero), Vector64.CreateScalar(Double.NaN))) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanOrEqualScalar_Vector64_Double_Zero(Vector64.CreateScalar(1.0)), 0.0)) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanOrEqualScalar_Vector64_Int64_Zero(Vector64.Zero), Vector64.CreateScalar(-1L))) + result = -1; + + if (!ValidateResult_Vector64(AdvSimd_Arm64_CompareLessThanOrEqualScalar_Vector64_Int64_Zero(Vector64.CreateScalar(1L)), 0L)) + result = -1; + + // End CompareLessThanOrEqual Tests + return result; }