Port to Chisel5

[erlingrj]

We should port the InterPRET to Chisel5. I guess this requires both FlexPRET and S4NOC to be ported first? @schoeberl, is there a plan for moving soc-comm to Chisel5?

[schoeberl]

I would first do a step to Chisel 3.6. 3.6 is the last version that runs on the JVM. From 5 on we need to install CIRCT, something I have not yet done. CIRCT means binaries, probably currently no support for Windows. Yes, I assume that soc-comm and FlexPRET needs to be bumped up as well. So, I would be happy to upgrade to 3.6, but wait a bit on 5. 3.6 can use the Scala based compiler and the CIRCT based compiler to generate Verilog. So this is a transition version. Cheers, Martin

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On 13.06.2023, at 13:04, erling ***@***.***> wrote: We should port the InterPRET to Chisel5. I guess this requires both FlexPRET and S4NOC to be ported first? @schoeberl <https://github.com/schoeberl>, is there a plan for moving soc-comm to Chisel5? — Reply to this email directly, view it on GitHub <#24>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AAE63GD7ZLJALRAT72DL5NDXLBCLDANCNFSM6AAAAAAZEV4Z2Q>. You are receiving this because you were mentioned.