From ec2b3ac9f28d6ff7632b07ab2b7aee134e71608b Mon Sep 17 00:00:00 2001 From: RunDevelopment Date: Sun, 4 Oct 2026 14:30:22 +0200 Subject: [PATCH 1/2] Add pseudo code to `compress*`/`expand*` docs --- fearless_simd/src/generated/simd_trait.rs | 248 +++++++++++----------- fearless_simd_gen/src/ops.rs | 30 ++- 2 files changed, 150 insertions(+), 128 deletions(-) diff --git a/fearless_simd/src/generated/simd_trait.rs b/fearless_simd/src/generated/simd_trait.rs index e5d83f34..b2dea2c5 100644 --- a/fearless_simd/src/generated/simd_trait.rs +++ b/fearless_simd/src/generated/simd_trait.rs @@ -294,18 +294,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f32x4(self, values: f32x4, mask: mask32x4) -> f32x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_f32x4( self, values: f32x4, mask: mask32x4, merge: f32x4, ) -> f32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f32x4(self, values: f32x4, mask: mask32x4) -> f32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_f32x4( self, values: f32x4, @@ -503,18 +503,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i8x16(self, values: i8x16, mask: mask8x16) -> i8x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i8x16( self, values: i8x16, mask: mask8x16, merge: i8x16, ) -> i8x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i8x16(self, values: i8x16, mask: mask8x16) -> i8x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i8x16( self, values: i8x16, @@ -654,18 +654,18 @@ pub trait Simd: b: u8x16, indices: u8x16, ) -> u8x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u8x16(self, values: u8x16, mask: mask8x16) -> u8x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u8x16( self, values: u8x16, mask: mask8x16, merge: u8x16, ) -> u8x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u8x16(self, values: u8x16, mask: mask8x16) -> u8x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u8x16( self, values: u8x16, @@ -877,18 +877,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i16x8(self, values: i16x8, mask: mask16x8) -> i16x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i16x8( self, values: i16x8, mask: mask16x8, merge: i16x8, ) -> i16x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i16x8(self, values: i16x8, mask: mask16x8) -> i16x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i16x8( self, values: i16x8, @@ -1057,18 +1057,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u16x8(self, values: u16x8, mask: mask16x8) -> u16x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u16x8( self, values: u16x8, mask: mask16x8, merge: u16x8, ) -> u16x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u16x8(self, values: u16x8, mask: mask16x8) -> u16x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u16x8( self, values: u16x8, @@ -1288,18 +1288,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i32x4(self, values: i32x4, mask: mask32x4) -> i32x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i32x4( self, values: i32x4, mask: mask32x4, merge: i32x4, ) -> i32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i32x4(self, values: i32x4, mask: mask32x4) -> i32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i32x4( self, values: i32x4, @@ -1470,18 +1470,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u32x4(self, values: u32x4, mask: mask32x4) -> u32x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u32x4( self, values: u32x4, mask: mask32x4, merge: u32x4, ) -> u32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u32x4(self, values: u32x4, mask: mask32x4) -> u32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u32x4( self, values: u32x4, @@ -1703,18 +1703,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f64x2(self, values: f64x2, mask: mask64x2) -> f64x2; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_f64x2( self, values: f64x2, mask: mask64x2, merge: f64x2, ) -> f64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f64x2(self, values: f64x2, mask: mask64x2) -> f64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_f64x2( self, values: f64x2, @@ -1916,18 +1916,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i64x2(self, values: i64x2, mask: mask64x2) -> i64x2; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i64x2( self, values: i64x2, mask: mask64x2, merge: i64x2, ) -> i64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i64x2(self, values: i64x2, mask: mask64x2) -> i64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i64x2( self, values: i64x2, @@ -2096,18 +2096,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u64x2(self, values: u64x2, mask: mask64x2) -> u64x2; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u64x2( self, values: u64x2, mask: mask64x2, merge: u64x2, ) -> u64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u64x2(self, values: u64x2, mask: mask64x2) -> u64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u64x2( self, values: u64x2, @@ -2342,18 +2342,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f32x8(self, values: f32x8, mask: mask32x8) -> f32x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_f32x8( self, values: f32x8, mask: mask32x8, merge: f32x8, ) -> f32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f32x8(self, values: f32x8, mask: mask32x8) -> f32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_f32x8( self, values: f32x8, @@ -2814,18 +2814,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i8x32(self, values: i8x32, mask: mask8x32) -> i8x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i8x32( self, values: i8x32, mask: mask8x32, merge: i8x32, ) -> i8x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i8x32(self, values: i8x32, mask: mask8x32) -> i8x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i8x32( self, values: i8x32, @@ -3155,18 +3155,18 @@ pub trait Simd: b: u8x32, indices: u8x32, ) -> u8x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u8x32(self, values: u8x32, mask: mask8x32) -> u8x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u8x32( self, values: u8x32, mask: mask8x32, merge: u8x32, ) -> u8x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u8x32(self, values: u8x32, mask: mask8x32) -> u8x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u8x32( self, values: u8x32, @@ -3643,18 +3643,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i16x16(self, values: i16x16, mask: mask16x16) -> i16x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i16x16( self, values: i16x16, mask: mask16x16, merge: i16x16, ) -> i16x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i16x16(self, values: i16x16, mask: mask16x16) -> i16x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i16x16( self, values: i16x16, @@ -4030,18 +4030,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u16x16(self, values: u16x16, mask: mask16x16) -> u16x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u16x16( self, values: u16x16, mask: mask16x16, merge: u16x16, ) -> u16x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u16x16(self, values: u16x16, mask: mask16x16) -> u16x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u16x16( self, values: u16x16, @@ -4548,18 +4548,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i32x8(self, values: i32x8, mask: mask32x8) -> i32x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i32x8( self, values: i32x8, mask: mask32x8, merge: i32x8, ) -> i32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i32x8(self, values: i32x8, mask: mask32x8) -> i32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i32x8( self, values: i32x8, @@ -4937,18 +4937,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u32x8(self, values: u32x8, mask: mask32x8) -> u32x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u32x8( self, values: u32x8, mask: mask32x8, merge: u32x8, ) -> u32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u32x8(self, values: u32x8, mask: mask32x8) -> u32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u32x8( self, values: u32x8, @@ -5461,18 +5461,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f64x4(self, values: f64x4, mask: mask64x4) -> f64x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_f64x4( self, values: f64x4, mask: mask64x4, merge: f64x4, ) -> f64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f64x4(self, values: f64x4, mask: mask64x4) -> f64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_f64x4( self, values: f64x4, @@ -5952,18 +5952,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i64x4(self, values: i64x4, mask: mask64x4) -> i64x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i64x4( self, values: i64x4, mask: mask64x4, merge: i64x4, ) -> i64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i64x4(self, values: i64x4, mask: mask64x4) -> i64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i64x4( self, values: i64x4, @@ -6333,18 +6333,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u64x4(self, values: u64x4, mask: mask64x4) -> u64x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u64x4( self, values: u64x4, mask: mask64x4, merge: u64x4, ) -> u64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u64x4(self, values: u64x4, mask: mask64x4) -> u64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u64x4( self, values: u64x4, @@ -6842,18 +6842,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f32x16(self, values: f32x16, mask: mask32x16) -> f32x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_f32x16( self, values: f32x16, mask: mask32x16, merge: f32x16, ) -> f32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f32x16(self, values: f32x16, mask: mask32x16) -> f32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_f32x16( self, values: f32x16, @@ -7322,18 +7322,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i8x64(self, values: i8x64, mask: mask8x64) -> i8x64; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i8x64( self, values: i8x64, mask: mask8x64, merge: i8x64, ) -> i8x64; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i8x64(self, values: i8x64, mask: mask8x64) -> i8x64; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i8x64( self, values: i8x64, @@ -7661,18 +7661,18 @@ pub trait Simd: b: u8x64, indices: u8x64, ) -> u8x64; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u8x64(self, values: u8x64, mask: mask8x64) -> u8x64; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u8x64( self, values: u8x64, mask: mask8x64, merge: u8x64, ) -> u8x64; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u8x64(self, values: u8x64, mask: mask8x64) -> u8x64; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u8x64( self, values: u8x64, @@ -8145,18 +8145,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i16x32(self, values: i16x32, mask: mask16x32) -> i16x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i16x32( self, values: i16x32, mask: mask16x32, merge: i16x32, ) -> i16x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i16x32(self, values: i16x32, mask: mask16x32) -> i16x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i16x32( self, values: i16x32, @@ -8536,18 +8536,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u16x32(self, values: u16x32, mask: mask16x32) -> u16x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u16x32( self, values: u16x32, mask: mask16x32, merge: u16x32, ) -> u16x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u16x32(self, values: u16x32, mask: mask16x32) -> u16x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u16x32( self, values: u16x32, @@ -9063,18 +9063,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i32x16(self, values: i32x16, mask: mask32x16) -> i32x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i32x16( self, values: i32x16, mask: mask32x16, merge: i32x16, ) -> i32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i32x16(self, values: i32x16, mask: mask32x16) -> i32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i32x16( self, values: i32x16, @@ -9454,18 +9454,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u32x16(self, values: u32x16, mask: mask32x16) -> u32x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u32x16( self, values: u32x16, mask: mask32x16, merge: u32x16, ) -> u32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u32x16(self, values: u32x16, mask: mask32x16) -> u32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u32x16( self, values: u32x16, @@ -9974,18 +9974,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f64x8(self, values: f64x8, mask: mask64x8) -> f64x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_f64x8( self, values: f64x8, mask: mask64x8, merge: f64x8, ) -> f64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f64x8(self, values: f64x8, mask: mask64x8) -> f64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_f64x8( self, values: f64x8, @@ -10463,18 +10463,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i64x8(self, values: i64x8, mask: mask64x8) -> i64x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_i64x8( self, values: i64x8, mask: mask64x8, merge: i64x8, ) -> i64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i64x8(self, values: i64x8, mask: mask64x8) -> i64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_i64x8( self, values: i64x8, @@ -10842,18 +10842,18 @@ pub trait Simd: indices, )) } - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u64x8(self, values: u64x8, mask: mask64x8) -> u64x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] fn compress_merge_u64x8( self, values: u64x8, mask: mask64x8, merge: u64x8, ) -> u64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u64x8(self, values: u64x8, mask: mask64x8) -> u64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] fn expand_merge_u64x8( self, values: u64x8, @@ -11845,13 +11845,13 @@ pub trait SimdBase: rhs: impl SimdInto, indices: impl SimdInto, ) -> Self; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress(self, mask: Self::Mask) -> Self; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = self[i]\n k += 1\nreturn result\n```"] fn compress_merge(self, mask: Self::Mask, merge: impl SimdInto) -> Self; - #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand(self, mask: Self::Mask) -> Self; - #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros."] + #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = self[k]\n k += 1\nreturn result\n```"] fn expand_merge(self, mask: Self::Mask, merge: impl SimdInto) -> Self; #[doc = "Return the maximum element in the vector. Integer vectors always return the exact maximum.\n\nFor floating-point vectors with no NaNs, this returns the true maximum. If any lane is NaN, the entire result is implementation-defined: it may be NaN or a numeric lane that is not the true maximum. See `reduce_max_precise` for a version that ignores quiet NaNs.\n\nIf the floating-point vector contains both positive zero and negative zero, either sign of zero may be returned."] fn reduce_max(self) -> Self::Element; diff --git a/fearless_simd_gen/src/ops.rs b/fearless_simd_gen/src/ops.rs index 8eff40dc..59a79119 100644 --- a/fearless_simd_gen/src/ops.rs +++ b/fearless_simd_gen/src/ops.rs @@ -698,7 +698,8 @@ const BASE_OPS: &[Op] = &[ OpSig::Compress { merge: false }, "Compact the elements selected by `{arg1}` into consecutive low lanes, preserving their order.\n\n\ Lanes above the number of selected elements are zero (positive zero for floats).\n\n\ - Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.", + Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n\ + This is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector.", ), Op::new( "compress_merge", @@ -706,7 +707,17 @@ const BASE_OPS: &[Op] = &[ OpSig::Compress { merge: true }, "Compact the elements selected by `{arg1}` into consecutive low lanes, preserving their order.\n\n\ Lanes above the number of selected elements retain the corresponding values from `{arg2}`.\n\n\ - Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.", + Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n\ + ## Pseudo code\n\n\ +```ignore +result = {arg2} +k = 0 +for i in 0..LEN: + if {arg1}[i]: + result[k] = {arg0}[i] + k += 1 +return result +```", ), Op::new( "expand", @@ -714,7 +725,8 @@ const BASE_OPS: &[Op] = &[ OpSig::Expand { merge: false }, "Expand consecutive low elements from `{arg0}` into the lanes selected by `{arg1}`, preserving their order.\n\n\ Unselected lanes are zero (positive zero for floats).\n\n\ - Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.", + Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\n\ + This is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector.", ), Op::new( "expand_merge", @@ -722,7 +734,17 @@ const BASE_OPS: &[Op] = &[ OpSig::Expand { merge: true }, "Expand consecutive low elements from `{arg0}` into the lanes selected by `{arg1}`, preserving their order.\n\n\ Unselected lanes retain the corresponding values from `{arg2}`.\n\n\ - Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.", + Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n\ + ## Pseudo code\n\n\ +```ignore +result = {arg2} +k = 0 +for i in 0..LEN: + if {arg1}[i]: + result[i] = {arg0}[k] + k += 1 +return result +```", ), ]; From 6775804b40de5be302b7378901ec1b251064b718 Mon Sep 17 00:00:00 2001 From: RunDevelopment Date: Sun, 4 Oct 2026 16:01:28 +0200 Subject: [PATCH 2/2] Use Rust code --- fearless_simd/src/generated/simd_trait.rs | 124 +++++++++++----------- fearless_simd_gen/src/ops.rs | 63 +++++++---- 2 files changed, 105 insertions(+), 82 deletions(-) diff --git a/fearless_simd/src/generated/simd_trait.rs b/fearless_simd/src/generated/simd_trait.rs index b2dea2c5..098a8f7e 100644 --- a/fearless_simd/src/generated/simd_trait.rs +++ b/fearless_simd/src/generated/simd_trait.rs @@ -296,7 +296,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f32x4(self, values: f32x4, mask: mask32x4) -> f32x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_f32x4( self, values: f32x4, @@ -305,7 +305,7 @@ pub trait Simd: ) -> f32x4; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f32x4(self, values: f32x4, mask: mask32x4) -> f32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_f32x4( self, values: f32x4, @@ -505,7 +505,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i8x16(self, values: i8x16, mask: mask8x16) -> i8x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i8x16( self, values: i8x16, @@ -514,7 +514,7 @@ pub trait Simd: ) -> i8x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i8x16(self, values: i8x16, mask: mask8x16) -> i8x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i8x16( self, values: i8x16, @@ -656,7 +656,7 @@ pub trait Simd: ) -> u8x16; #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u8x16(self, values: u8x16, mask: mask8x16) -> u8x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u8x16( self, values: u8x16, @@ -665,7 +665,7 @@ pub trait Simd: ) -> u8x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u8x16(self, values: u8x16, mask: mask8x16) -> u8x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u8x16( self, values: u8x16, @@ -879,7 +879,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i16x8(self, values: i16x8, mask: mask16x8) -> i16x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i16x8( self, values: i16x8, @@ -888,7 +888,7 @@ pub trait Simd: ) -> i16x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i16x8(self, values: i16x8, mask: mask16x8) -> i16x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i16x8( self, values: i16x8, @@ -1059,7 +1059,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u16x8(self, values: u16x8, mask: mask16x8) -> u16x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u16x8( self, values: u16x8, @@ -1068,7 +1068,7 @@ pub trait Simd: ) -> u16x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u16x8(self, values: u16x8, mask: mask16x8) -> u16x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u16x8( self, values: u16x8, @@ -1290,7 +1290,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i32x4(self, values: i32x4, mask: mask32x4) -> i32x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i32x4( self, values: i32x4, @@ -1299,7 +1299,7 @@ pub trait Simd: ) -> i32x4; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i32x4(self, values: i32x4, mask: mask32x4) -> i32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i32x4( self, values: i32x4, @@ -1472,7 +1472,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u32x4(self, values: u32x4, mask: mask32x4) -> u32x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u32x4( self, values: u32x4, @@ -1481,7 +1481,7 @@ pub trait Simd: ) -> u32x4; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u32x4(self, values: u32x4, mask: mask32x4) -> u32x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u32x4( self, values: u32x4, @@ -1705,7 +1705,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f64x2(self, values: f64x2, mask: mask64x2) -> f64x2; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_f64x2( self, values: f64x2, @@ -1714,7 +1714,7 @@ pub trait Simd: ) -> f64x2; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f64x2(self, values: f64x2, mask: mask64x2) -> f64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_f64x2( self, values: f64x2, @@ -1918,7 +1918,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i64x2(self, values: i64x2, mask: mask64x2) -> i64x2; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i64x2( self, values: i64x2, @@ -1927,7 +1927,7 @@ pub trait Simd: ) -> i64x2; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i64x2(self, values: i64x2, mask: mask64x2) -> i64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i64x2( self, values: i64x2, @@ -2098,7 +2098,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u64x2(self, values: u64x2, mask: mask64x2) -> u64x2; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u64x2( self, values: u64x2, @@ -2107,7 +2107,7 @@ pub trait Simd: ) -> u64x2; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u64x2(self, values: u64x2, mask: mask64x2) -> u64x2; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u64x2( self, values: u64x2, @@ -2344,7 +2344,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f32x8(self, values: f32x8, mask: mask32x8) -> f32x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_f32x8( self, values: f32x8, @@ -2353,7 +2353,7 @@ pub trait Simd: ) -> f32x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f32x8(self, values: f32x8, mask: mask32x8) -> f32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_f32x8( self, values: f32x8, @@ -2816,7 +2816,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i8x32(self, values: i8x32, mask: mask8x32) -> i8x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i8x32( self, values: i8x32, @@ -2825,7 +2825,7 @@ pub trait Simd: ) -> i8x32; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i8x32(self, values: i8x32, mask: mask8x32) -> i8x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i8x32( self, values: i8x32, @@ -3157,7 +3157,7 @@ pub trait Simd: ) -> u8x32; #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u8x32(self, values: u8x32, mask: mask8x32) -> u8x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u8x32( self, values: u8x32, @@ -3166,7 +3166,7 @@ pub trait Simd: ) -> u8x32; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u8x32(self, values: u8x32, mask: mask8x32) -> u8x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u8x32( self, values: u8x32, @@ -3645,7 +3645,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i16x16(self, values: i16x16, mask: mask16x16) -> i16x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i16x16( self, values: i16x16, @@ -3654,7 +3654,7 @@ pub trait Simd: ) -> i16x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i16x16(self, values: i16x16, mask: mask16x16) -> i16x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i16x16( self, values: i16x16, @@ -4032,7 +4032,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u16x16(self, values: u16x16, mask: mask16x16) -> u16x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u16x16( self, values: u16x16, @@ -4041,7 +4041,7 @@ pub trait Simd: ) -> u16x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u16x16(self, values: u16x16, mask: mask16x16) -> u16x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u16x16( self, values: u16x16, @@ -4550,7 +4550,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i32x8(self, values: i32x8, mask: mask32x8) -> i32x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i32x8( self, values: i32x8, @@ -4559,7 +4559,7 @@ pub trait Simd: ) -> i32x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i32x8(self, values: i32x8, mask: mask32x8) -> i32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i32x8( self, values: i32x8, @@ -4939,7 +4939,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u32x8(self, values: u32x8, mask: mask32x8) -> u32x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u32x8( self, values: u32x8, @@ -4948,7 +4948,7 @@ pub trait Simd: ) -> u32x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u32x8(self, values: u32x8, mask: mask32x8) -> u32x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u32x8( self, values: u32x8, @@ -5463,7 +5463,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f64x4(self, values: f64x4, mask: mask64x4) -> f64x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_f64x4( self, values: f64x4, @@ -5472,7 +5472,7 @@ pub trait Simd: ) -> f64x4; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f64x4(self, values: f64x4, mask: mask64x4) -> f64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_f64x4( self, values: f64x4, @@ -5954,7 +5954,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i64x4(self, values: i64x4, mask: mask64x4) -> i64x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i64x4( self, values: i64x4, @@ -5963,7 +5963,7 @@ pub trait Simd: ) -> i64x4; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i64x4(self, values: i64x4, mask: mask64x4) -> i64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i64x4( self, values: i64x4, @@ -6335,7 +6335,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u64x4(self, values: u64x4, mask: mask64x4) -> u64x4; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u64x4( self, values: u64x4, @@ -6344,7 +6344,7 @@ pub trait Simd: ) -> u64x4; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u64x4(self, values: u64x4, mask: mask64x4) -> u64x4; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u64x4( self, values: u64x4, @@ -6844,7 +6844,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f32x16(self, values: f32x16, mask: mask32x16) -> f32x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_f32x16( self, values: f32x16, @@ -6853,7 +6853,7 @@ pub trait Simd: ) -> f32x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f32x16(self, values: f32x16, mask: mask32x16) -> f32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_f32x16( self, values: f32x16, @@ -7324,7 +7324,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i8x64(self, values: i8x64, mask: mask8x64) -> i8x64; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i8x64( self, values: i8x64, @@ -7333,7 +7333,7 @@ pub trait Simd: ) -> i8x64; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i8x64(self, values: i8x64, mask: mask8x64) -> i8x64; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i8x64( self, values: i8x64, @@ -7663,7 +7663,7 @@ pub trait Simd: ) -> u8x64; #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u8x64(self, values: u8x64, mask: mask8x64) -> u8x64; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u8x64( self, values: u8x64, @@ -7672,7 +7672,7 @@ pub trait Simd: ) -> u8x64; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u8x64(self, values: u8x64, mask: mask8x64) -> u8x64; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u8x64( self, values: u8x64, @@ -8147,7 +8147,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i16x32(self, values: i16x32, mask: mask16x32) -> i16x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i16x32( self, values: i16x32, @@ -8156,7 +8156,7 @@ pub trait Simd: ) -> i16x32; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i16x32(self, values: i16x32, mask: mask16x32) -> i16x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i16x32( self, values: i16x32, @@ -8538,7 +8538,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u16x32(self, values: u16x32, mask: mask16x32) -> u16x32; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u16x32( self, values: u16x32, @@ -8547,7 +8547,7 @@ pub trait Simd: ) -> u16x32; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u16x32(self, values: u16x32, mask: mask16x32) -> u16x32; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u16x32( self, values: u16x32, @@ -9065,7 +9065,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i32x16(self, values: i32x16, mask: mask32x16) -> i32x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i32x16( self, values: i32x16, @@ -9074,7 +9074,7 @@ pub trait Simd: ) -> i32x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i32x16(self, values: i32x16, mask: mask32x16) -> i32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i32x16( self, values: i32x16, @@ -9456,7 +9456,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u32x16(self, values: u32x16, mask: mask32x16) -> u32x16; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u32x16( self, values: u32x16, @@ -9465,7 +9465,7 @@ pub trait Simd: ) -> u32x16; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u32x16(self, values: u32x16, mask: mask32x16) -> u32x16; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u32x16( self, values: u32x16, @@ -9976,7 +9976,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_f64x8(self, values: f64x8, mask: mask64x8) -> f64x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_f64x8( self, values: f64x8, @@ -9985,7 +9985,7 @@ pub trait Simd: ) -> f64x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_f64x8(self, values: f64x8, mask: mask64x8) -> f64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_f64x8( self, values: f64x8, @@ -10465,7 +10465,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_i64x8(self, values: i64x8, mask: mask64x8) -> i64x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_i64x8( self, values: i64x8, @@ -10474,7 +10474,7 @@ pub trait Simd: ) -> i64x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_i64x8(self, values: i64x8, mask: mask64x8) -> i64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_i64x8( self, values: i64x8, @@ -10844,7 +10844,7 @@ pub trait Simd: } #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress_u64x8(self, values: u64x8, mask: mask64x8) -> u64x8; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = values[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = values[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge_u64x8( self, values: u64x8, @@ -10853,7 +10853,7 @@ pub trait Simd: ) -> u64x8; #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand_u64x8(self, values: u64x8, mask: mask64x8) -> u64x8; - #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = values[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `values` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = values[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge_u64x8( self, values: u64x8, @@ -11847,11 +11847,11 @@ pub trait SimdBase: ) -> Self; #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\nThis is equivalent to [`SimdBase::compress_merge`] with a zeroed merge vector."] fn compress(self, mask: Self::Mask) -> Self; - #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[k] = self[i]\n k += 1\nreturn result\n```"] + #[doc = "Compact the elements selected by `mask` into consecutive low lanes, preserving their order.\n\nLanes above the number of selected elements retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[k] = self[i];\n k += 1;\n }\n}\nreturn result;\n```"] fn compress_merge(self, mask: Self::Mask, merge: impl SimdInto) -> Self; #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes are zero (positive zero for floats).\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros..\n\nThis is equivalent to [`SimdBase::expand_merge`] with a zeroed merge vector."] fn expand(self, mask: Self::Mask) -> Self; - #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nresult = merge\nk = 0\nfor i in 0..LEN:\n if mask[i]:\n result[i] = self[k]\n k += 1\nreturn result\n```"] + #[doc = "Expand consecutive low elements from `self` into the lanes selected by `mask`, preserving their order.\n\nUnselected lanes retain the corresponding values from `merge`.\n\nElements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n## Pseudo code\n\n```ignore\nlet mut result = merge;\nlet mut k = 0;\nfor i in 0..LEN {\n if mask[i] {\n result[i] = self[k];\n k += 1;\n }\n}\nreturn result;\n```"] fn expand_merge(self, mask: Self::Mask, merge: impl SimdInto) -> Self; #[doc = "Return the maximum element in the vector. Integer vectors always return the exact maximum.\n\nFor floating-point vectors with no NaNs, this returns the true maximum. If any lane is NaN, the entire result is implementation-defined: it may be NaN or a numeric lane that is not the true maximum. See `reduce_max_precise` for a version that ignores quiet NaNs.\n\nIf the floating-point vector contains both positive zero and negative zero, either sign of zero may be returned."] fn reduce_max(self) -> Self::Element; diff --git a/fearless_simd_gen/src/ops.rs b/fearless_simd_gen/src/ops.rs index 59a79119..bbf61073 100644 --- a/fearless_simd_gen/src/ops.rs +++ b/fearless_simd_gen/src/ops.rs @@ -536,15 +536,34 @@ impl Op { let mut remaining = self.doc; let mut dest = String::new(); loop { - // Go until we reach the next opening brace. If there is none, push the rest of the string; we're done, - let Some((left, right)) = remaining.split_once('{') else { - dest.push_str(remaining); - break; + let var_start = loop { + let Some((left, right)) = remaining.split_once('{') else { + // no more braces = no more interpolation + dest.push_str(remaining); + break None; + }; + + dest.push_str(left); + + // variable interpolation has to start with `{` followed by a letter. + if right + .chars() + .next() + .is_some_and(|c| c.is_ascii_alphabetic()) + { + break Some(right); + } + + // we found a brace that isn't a variable interpolation + dest.push('{'); + remaining = right; }; - dest.push_str(left); + let Some(var_start) = var_start else { + break; + }; - let Some((template_var, rest)) = right.split_once('}') else { + let Some((template_var, rest)) = var_start.split_once('}') else { panic!("Unmatched closing brace: {docstring:?}"); }; if let Err(e) = interpolate_var_into(&mut dest, template_var) { @@ -710,13 +729,15 @@ const BASE_OPS: &[Op] = &[ Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n\ ## Pseudo code\n\n\ ```ignore -result = {arg2} -k = 0 -for i in 0..LEN: - if {arg1}[i]: - result[k] = {arg0}[i] - k += 1 -return result +let mut result = {arg2}; +let mut k = 0; +for i in 0..LEN { + if {arg1}[i] { + result[k] = {arg0}[i]; + k += 1; + } +} +return result; ```", ), Op::new( @@ -737,13 +758,15 @@ return result Elements are moved without changing their bits, including floating-point NaN payloads and signed zeros.\n\n\ ## Pseudo code\n\n\ ```ignore -result = {arg2} -k = 0 -for i in 0..LEN: - if {arg1}[i]: - result[i] = {arg0}[k] - k += 1 -return result +let mut result = {arg2}; +let mut k = 0; +for i in 0..LEN { + if {arg1}[i] { + result[i] = {arg0}[k]; + k += 1; + } +} +return result; ```", ), ];