diff --git a/debugcc.c b/debugcc.c
index e2220cc..6946071 100644
--- a/debugcc.c
+++ b/debugcc.c
@@ -14,7 +14,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static unsigned int measure_ticks(struct gcc_mux *gcc, unsigned int ticks)
 {
diff --git a/linux-x86-to-arm64.txt b/linux-x86-to-arm64.txt
new file mode 100644
index 0000000..f052d45
--- /dev/null
+++ b/linux-x86-to-arm64.txt
@@ -0,0 +1,10 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+ar = 'aarch64-linux-gnu-ar'
+strip = 'aarch64-linux-gnu-strip'
+
+[target_machine]
+system = 'linux'
+cpu_family = 'arm64'
+cpu = 'arm64'
+endian = 'little'
diff --git a/meson.build b/meson.build
index 5ef4838..545af7d 100644
--- a/meson.build
+++ b/meson.build
@@ -11,6 +11,7 @@ project('debugcc',
 )
 
 platforms = [
+  'glymur',
   'hamoa',
   'ipq8064',
   'milos',
@@ -44,7 +45,7 @@ platform_defs = []
 platform_array = []
 
 foreach p: platforms
-  debugcc_srcs += p + '.c'
+  debugcc_srcs += 'platforms/' + p + '.c'
   platform_defs += 'extern struct debugcc_platform ' + p + '_debugcc;'
   platform_array += '\t&' + p + '_debugcc,'
 
@@ -70,4 +71,5 @@ endif
 executable('debugcc',
   debugcc_srcs,
   link_args: debugcc_link_args,
+  include_directories : include_directories('.'),
   install: true)
diff --git a/platforms/glymur.c b/platforms/glymur.c
new file mode 100644
index 0000000..b1cf910
--- /dev/null
+++ b/platforms/glymur.c
@@ -0,0 +1,623 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */
+
+#include <sys/mman.h>
+#include <err.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "debugcc.h"
+
+static struct gcc_mux gcc = {
+	.mux = {
+		.phys = 0x100000,
+		.size = 0x1f9000,
+
+		.measure = measure_gcc,
+
+		.enable_reg = 0x87004,
+		.enable_mask = BIT(0),
+
+		.mux_reg = 0x87048,
+		.mux_mask = 0x3ff,
+
+		.div_reg = 0x87000,
+		.div_mask = 0xf,
+		.div_val = 2,
+	},
+
+	.xo_div4_reg = 0x87008,
+	.debug_ctl_reg = 0x87040,
+	.debug_status_reg = 0x87044,
+};
+
+static struct debug_mux av1e_cc = {
+	.phys = 0x15220000,
+	.size = 0x14000,
+	.block_name = "av1e",
+
+	.measure = measure_leaf,
+	.parent = &gcc.mux,
+	.parent_mux_val = 0xdf,
+
+	.enable_reg = 0x600c,
+	.enable_mask = BIT(0),
+
+	.mux_reg = 0x6004,
+	.mux_mask = 0x3f,
+
+	.div_reg = 0x6008,
+	.div_mask = 0xf,
+	.div_val = 3,
+};
+
+static struct debug_mux cam_cc = {
+	.phys = 0xade0000,
+	.size = 0x20000,
+	.block_name = "cam",
+
+	.measure = measure_leaf,
+	.parent = &gcc.mux,
+	.parent_mux_val = 0xc7,
+
+	.enable_reg = 0x14008,
+	.enable_mask = BIT(0),
+
+	.mux_reg = 0x16000,
+	.mux_mask = 0xff,
+
+	.div_reg = 0x14004,
+	.div_mask = 0xf,
+	.div_val = 4,
+};
+
+static struct debug_mux disp_cc = {
+	.phys = 0xaf00000,
+	.size = 0x20000,
+	.block_name = "disp",
+
+	.measure = measure_leaf,
+	.parent = &gcc.mux,
+	.parent_mux_val = 0xcb,
+
+	.enable_reg = 0xd004,
+	.enable_mask = BIT(0),
+
+	.mux_reg = 0x11000,
+	.mux_mask = 0x1ff,
+
+	.div_reg = 0xd000,
+	.div_mask = 0xf,
+	.div_val = 4,
+};
+
+static struct debug_mux eva_cc = {
+	.phys = 0xabf0000,
+	.size = 0x10000,
+	.block_name = "eva",
+
+	.measure = measure_leaf,
+	.parent = &gcc.mux,
+	.parent_mux_val = 0xdb,
+
+	.enable_reg = 0xd004,
+	.enable_mask = BIT(0),
+
+	.mux_reg = 0x9a4c,
+	.mux_mask = 0x3f,
+
+	.div_reg = 0x80a8,
+	.div_mask = 0xf,
+	.div_val = 3,
+};
+
+static struct debug_mux gpu_cc = {
+	.phys = 0x3d90000,
+	.size = 0x9800,
+	.block_name = "gpu",
+
+	.measure = measure_leaf,
+	.parent = &gcc.mux,
+	.parent_mux_val = 0x2ca,
+
+	.enable_reg = 0x9274,
+	.enable_mask = BIT(0),
+
+	.mux_reg = 0x9564,
+	.mux_mask = 0xff,
+
+	.div_reg = 0x9270,
+	.div_mask = 0xf,
+	.div_val = 2,
+};
+
+static struct debug_mux video_cc = {
+	.phys = 0xaaf8000,
+	.size = 0x10000,
+	.block_name = "video",
+
+	.measure = measure_leaf,
+	.parent = &gcc.mux,
+	.parent_mux_val = 0xd6,
+
+	.enable_reg = 0xc004,
+	.enable_mask = BIT(0),
+
+	.mux_reg = 0x5a4c,
+	.mux_mask = 0x3f,
+
+	.div_reg = 0xc000,
+	.div_mask = 0xf,
+	.div_val = 3,
+};
+
+static struct measure_clk glymur_clocks[] = {
+	/* GCC entries */
+	{ "gcc_aggre_noc_pcie_3a_west_sf_axi_clk", &gcc.mux, 0x87 },
+	{ "gcc_aggre_noc_pcie_3b_west_sf_axi_clk", &gcc.mux, 0x88 },
+	{ "gcc_aggre_noc_pcie_4_west_sf_axi_clk", &gcc.mux, 0x89 },
+	{ "gcc_aggre_noc_pcie_5_east_sf_axi_clk", &gcc.mux, 0x8a },
+	{ "gcc_aggre_noc_pcie_6_west_sf_axi_clk", &gcc.mux, 0x8b },
+	{ "gcc_aggre_ufs_phy_axi_clk", &gcc.mux, 0x85 },
+	{ "gcc_aggre_usb2_prim_axi_clk", &gcc.mux, 0x8f },
+	{ "gcc_aggre_usb3_mp_axi_clk", &gcc.mux, 0x8e },
+	{ "gcc_aggre_usb3_prim_axi_clk", &gcc.mux, 0x84 },
+	{ "gcc_aggre_usb3_sec_axi_clk", &gcc.mux, 0x90 },
+	{ "gcc_aggre_usb3_tert_axi_clk", &gcc.mux, 0x91 },
+	{ "gcc_aggre_usb4_0_axi_clk", &gcc.mux, 0x92 },
+	{ "gcc_aggre_usb4_1_axi_clk", &gcc.mux, 0x93 },
+	{ "gcc_aggre_usb4_2_axi_clk", &gcc.mux, 0x94 },
+	{ "gcc_av1e_ahb_clk", &gcc.mux, 0xdc },
+	{ "gcc_av1e_axi_clk", &gcc.mux, 0xdd },
+	{ "gcc_av1e_xo_clk", &gcc.mux, 0xde },
+	{ "gcc_boot_rom_ahb_clk", &gcc.mux, 0x1e6 },
+	{ "gcc_camera_ahb_clk", &gcc.mux, 0xbe },
+	{ "gcc_camera_hf_axi_clk", &gcc.mux, 0xc2 },
+	{ "gcc_camera_sf_axi_clk", &gcc.mux, 0xc4 },
+	{ "gcc_camera_xo_clk", &gcc.mux, 0xc6 },
+	{ "gcc_cfg_noc_pcie_anoc_ahb_clk", &gcc.mux, 0x71 },
+	{ "gcc_cfg_noc_pcie_anoc_south_ahb_clk", &gcc.mux, 0x68 },
+	{ "gcc_cfg_noc_usb2_prim_axi_clk", &gcc.mux, 0x66 },
+	{ "gcc_cfg_noc_usb3_mp_axi_clk", &gcc.mux, 0x67 },
+	{ "gcc_cfg_noc_usb3_prim_axi_clk", &gcc.mux, 0x55 },
+	{ "gcc_cfg_noc_usb3_sec_axi_clk", &gcc.mux, 0x6b },
+	{ "gcc_cfg_noc_usb3_tert_axi_clk", &gcc.mux, 0x6c },
+	{ "gcc_cfg_noc_usb_anoc_ahb_clk", &gcc.mux, 0x69 },
+	{ "gcc_cfg_noc_usb_anoc_south_ahb_clk", &gcc.mux, 0x6a },
+	{ "gcc_disp_ahb_clk", &gcc.mux, 0xc9 },
+	{ "gcc_disp_hf_axi_clk", &gcc.mux, 0xca },
+	{ "gcc_eva_ahb_clk", &gcc.mux, 0xd7 },
+	{ "gcc_eva_axi0_clk", &gcc.mux, 0xd8 },
+	{ "gcc_eva_axi0c_clk", &gcc.mux, 0xd9 },
+	{ "gcc_eva_xo_clk", &gcc.mux, 0xda },
+	{ "gcc_gp1_clk", &gcc.mux, 0x267 },
+	{ "gcc_gp2_clk", &gcc.mux, 0x268 },
+	{ "gcc_gp3_clk", &gcc.mux, 0x269 },
+	{ "gcc_gpu_cfg_ahb_clk", &gcc.mux, 0x2c7 },
+	{ "gcc_gpu_gemnoc_gfx_clk", &gcc.mux, 0x2cb },
+	{ "gcc_gpu_gpll0_clk_src", &gcc.mux, 0x2cd },
+	{ "gcc_gpu_gpll0_div_clk_src", &gcc.mux, 0x2ce },
+	{ "gcc_pcie_0_aux_clk", &gcc.mux, 0x16b },
+	{ "gcc_pcie_0_cfg_ahb_clk", &gcc.mux, 0x16a },
+	{ "gcc_pcie_0_mstr_axi_clk", &gcc.mux, 0x169 },
+	{ "gcc_pcie_0_phy_rchng_clk", &gcc.mux, 0x16d },
+	{ "gcc_pcie_0_pipe_clk", &gcc.mux, 0x16c },
+	{ "gcc_pcie_0_slv_axi_clk", &gcc.mux, 0x168 },
+	{ "gcc_pcie_0_slv_q2a_axi_clk", &gcc.mux, 0x167 },
+	{ "gcc_pcie_1_aux_clk", &gcc.mux, 0x162 },
+	{ "gcc_pcie_1_cfg_ahb_clk", &gcc.mux, 0x161 },
+	{ "gcc_pcie_1_mstr_axi_clk", &gcc.mux, 0x160 },
+	{ "gcc_pcie_1_phy_rchng_clk", &gcc.mux, 0x164 },
+	{ "gcc_pcie_1_pipe_clk", &gcc.mux, 0x163 },
+	{ "gcc_pcie_1_slv_axi_clk", &gcc.mux, 0x15f },
+	{ "gcc_pcie_1_slv_q2a_axi_clk", &gcc.mux, 0x15e },
+	{ "gcc_pcie_2_aux_clk", &gcc.mux, 0x174 },
+	{ "gcc_pcie_2_cfg_ahb_clk", &gcc.mux, 0x173 },
+	{ "gcc_pcie_2_mstr_axi_clk", &gcc.mux, 0x172 },
+	{ "gcc_pcie_2_phy_rchng_clk", &gcc.mux, 0x176 },
+	{ "gcc_pcie_2_pipe_clk", &gcc.mux, 0x175 },
+	{ "gcc_pcie_2_slv_axi_clk", &gcc.mux, 0x171 },
+	{ "gcc_pcie_2_slv_q2a_axi_clk", &gcc.mux, 0x170 },
+	{ "gcc_pcie_3a_aux_clk", &gcc.mux, 0x26f },
+	{ "gcc_pcie_3a_cfg_ahb_clk", &gcc.mux, 0x26e },
+	{ "gcc_pcie_3a_mstr_axi_clk", &gcc.mux, 0x26d },
+	{ "gcc_pcie_3a_phy_rchng_clk", &gcc.mux, 0x272 },
+	{ "gcc_pcie_3a_pipe_clk", &gcc.mux, 0x270 },
+	{ "gcc_pcie_3a_slv_axi_clk", &gcc.mux, 0x26c },
+	{ "gcc_pcie_3a_slv_q2a_axi_clk", &gcc.mux, 0x26b },
+	{ "gcc_pcie_3b_aux_clk", &gcc.mux, 0x27b },
+	{ "gcc_pcie_3b_cfg_ahb_clk", &gcc.mux, 0x27a },
+	{ "gcc_pcie_3b_mstr_axi_clk", &gcc.mux, 0x279 },
+	{ "gcc_pcie_3b_phy_rchng_clk", &gcc.mux, 0x27e },
+	{ "gcc_pcie_3b_pipe_clk", &gcc.mux, 0x27c },
+	{ "gcc_pcie_3b_pipe_div2_clk", &gcc.mux, 0x27d },
+	{ "gcc_pcie_3b_slv_axi_clk", &gcc.mux, 0x278 },
+	{ "gcc_pcie_3b_slv_q2a_axi_clk", &gcc.mux, 0x277 },
+	{ "gcc_pcie_4_aux_clk", &gcc.mux, 0x297 },
+	{ "gcc_pcie_4_cfg_ahb_clk", &gcc.mux, 0x296 },
+	{ "gcc_pcie_4_mstr_axi_clk", &gcc.mux, 0x295 },
+	{ "gcc_pcie_4_phy_rchng_clk", &gcc.mux, 0x29a },
+	{ "gcc_pcie_4_pipe_clk", &gcc.mux, 0x298 },
+	{ "gcc_pcie_4_pipe_div2_clk", &gcc.mux, 0x299 },
+	{ "gcc_pcie_4_slv_axi_clk", &gcc.mux, 0x294 },
+	{ "gcc_pcie_4_slv_q2a_axi_clk", &gcc.mux, 0x293 },
+	{ "gcc_pcie_5_aux_clk", &gcc.mux, 0x289 },
+	{ "gcc_pcie_5_cfg_ahb_clk", &gcc.mux, 0x288 },
+	{ "gcc_pcie_5_mstr_axi_clk", &gcc.mux, 0x287 },
+	{ "gcc_pcie_5_phy_rchng_clk", &gcc.mux, 0x28c },
+	{ "gcc_pcie_5_pipe_clk", &gcc.mux, 0x28a },
+	{ "gcc_pcie_5_pipe_div2_clk", &gcc.mux, 0x28b },
+	{ "gcc_pcie_5_slv_axi_clk", &gcc.mux, 0x286 },
+	{ "gcc_pcie_5_slv_q2a_axi_clk", &gcc.mux, 0x285 },
+	{ "gcc_pcie_6_aux_clk", &gcc.mux, 0x2a3 },
+	{ "gcc_pcie_6_cfg_ahb_clk", &gcc.mux, 0x2a2 },
+	{ "gcc_pcie_6_mstr_axi_clk", &gcc.mux, 0x2a1 },
+	{ "gcc_pcie_6_phy_rchng_clk", &gcc.mux, 0x2a6 },
+	{ "gcc_pcie_6_pipe_clk", &gcc.mux, 0x2a4 },
+	{ "gcc_pcie_6_pipe_div2_clk", &gcc.mux, 0x2a5 },
+	{ "gcc_pcie_6_slv_axi_clk", &gcc.mux, 0x2a0 },
+	{ "gcc_pcie_6_slv_q2a_axi_clk", &gcc.mux, 0x29f },
+	{ "gcc_pcie_noc_pwrctl_clk", &gcc.mux, 0x43 },
+	{ "gcc_pcie_noc_qosgen_extref_clk", &gcc.mux, 0x42 },
+	{ "gcc_pcie_noc_sf_center_clk", &gcc.mux, 0x44 },
+	{ "gcc_pcie_noc_slave_sf_east_clk", &gcc.mux, 0x45 },
+	{ "gcc_pcie_noc_slave_sf_west_clk", &gcc.mux, 0x46 },
+	{ "gcc_pcie_noc_tsctr_clk", &gcc.mux, 0x41 },
+	{ "gcc_pcie_phy_3a_aux_clk", &gcc.mux, 0x275 },
+	{ "gcc_pcie_phy_3b_aux_clk", &gcc.mux, 0x283 },
+	{ "gcc_pcie_phy_4_aux_clk", &gcc.mux, 0x29d },
+	{ "gcc_pcie_phy_5_aux_clk", &gcc.mux, 0x291 },
+	{ "gcc_pcie_phy_6_aux_clk", &gcc.mux, 0x2a9 },
+	{ "gcc_pcie_rscc_cfg_ahb_clk", &gcc.mux, 0x2e7 },
+	{ "gcc_pcie_rscc_xo_clk", &gcc.mux, 0x2e8 },
+	{ "gcc_pdm2_clk", &gcc.mux, 0x1d6 },
+	{ "gcc_pdm_ahb_clk", &gcc.mux, 0x1d4 },
+	{ "gcc_pdm_xo4_clk", &gcc.mux, 0x1d5 },
+	{ "gcc_qupv3_oob_core_2x_clk", &gcc.mux, 0x1a1 },
+	{ "gcc_qupv3_oob_core_clk", &gcc.mux, 0x1a0 },
+	{ "gcc_qupv3_oob_qspi_s0_clk", &gcc.mux, 0x1a5 },
+	{ "gcc_qupv3_oob_qspi_s1_clk", &gcc.mux, 0x1a6 },
+	{ "gcc_qupv3_oob_s0_clk", &gcc.mux, 0x1a2 },
+	{ "gcc_qupv3_oob_s1_clk", &gcc.mux, 0x1a3 },
+	{ "gcc_qupv3_oob_s_ahb_clk", &gcc.mux, 0x19f },
+	{ "gcc_qupv3_oob_tcxo_clk", &gcc.mux, 0x1a4 },
+	{ "gcc_qupv3_wrap0_core_2x_clk", &gcc.mux, 0x1c8 },
+	{ "gcc_qupv3_wrap0_core_clk", &gcc.mux, 0x1c7 },
+	{ "gcc_qupv3_wrap0_qspi_s2_clk", &gcc.mux, 0x1d2 },
+	{ "gcc_qupv3_wrap0_qspi_s3_clk", &gcc.mux, 0x1d3 },
+	{ "gcc_qupv3_wrap0_qspi_s6_clk", &gcc.mux, 0x1d1 },
+	{ "gcc_qupv3_wrap0_s0_clk", &gcc.mux, 0x1c9 },
+	{ "gcc_qupv3_wrap0_s1_clk", &gcc.mux, 0x1ca },
+	{ "gcc_qupv3_wrap0_s2_clk", &gcc.mux, 0x1cb },
+	{ "gcc_qupv3_wrap0_s3_clk", &gcc.mux, 0x1cc },
+	{ "gcc_qupv3_wrap0_s4_clk", &gcc.mux, 0x1cd },
+	{ "gcc_qupv3_wrap0_s5_clk", &gcc.mux, 0x1ce },
+	{ "gcc_qupv3_wrap0_s6_clk", &gcc.mux, 0x1cf },
+	{ "gcc_qupv3_wrap0_s7_clk", &gcc.mux, 0x1d0 },
+	{ "gcc_qupv3_wrap1_core_2x_clk", &gcc.mux, 0x1aa },
+	{ "gcc_qupv3_wrap1_core_clk", &gcc.mux, 0x1a9 },
+	{ "gcc_qupv3_wrap1_qspi_s2_clk", &gcc.mux, 0x1b4 },
+	{ "gcc_qupv3_wrap1_qspi_s3_clk", &gcc.mux, 0x1b5 },
+	{ "gcc_qupv3_wrap1_qspi_s6_clk", &gcc.mux, 0x1b3 },
+	{ "gcc_qupv3_wrap1_s0_clk", &gcc.mux, 0x1ab },
+	{ "gcc_qupv3_wrap1_s1_clk", &gcc.mux, 0x1ac },
+	{ "gcc_qupv3_wrap1_s2_clk", &gcc.mux, 0x1ad },
+	{ "gcc_qupv3_wrap1_s3_clk", &gcc.mux, 0x1ae },
+	{ "gcc_qupv3_wrap1_s4_clk", &gcc.mux, 0x1af },
+	{ "gcc_qupv3_wrap1_s5_clk", &gcc.mux, 0x1b0 },
+	{ "gcc_qupv3_wrap1_s6_clk", &gcc.mux, 0x1b1 },
+	{ "gcc_qupv3_wrap1_s7_clk", &gcc.mux, 0x1b2 },
+	{ "gcc_qupv3_wrap2_core_2x_clk", &gcc.mux, 0x1b9 },
+	{ "gcc_qupv3_wrap2_core_clk", &gcc.mux, 0x1b8 },
+	{ "gcc_qupv3_wrap2_qspi_s2_clk", &gcc.mux, 0x1c3 },
+	{ "gcc_qupv3_wrap2_qspi_s3_clk", &gcc.mux, 0x1c4 },
+	{ "gcc_qupv3_wrap2_qspi_s6_clk", &gcc.mux, 0x1c2 },
+	{ "gcc_qupv3_wrap2_s0_clk", &gcc.mux, 0x1ba },
+	{ "gcc_qupv3_wrap2_s1_clk", &gcc.mux, 0x1bb },
+	{ "gcc_qupv3_wrap2_s2_clk", &gcc.mux, 0x1bc },
+	{ "gcc_qupv3_wrap2_s3_clk", &gcc.mux, 0x1bd },
+	{ "gcc_qupv3_wrap2_s4_clk", &gcc.mux, 0x1be },
+	{ "gcc_qupv3_wrap2_s5_clk", &gcc.mux, 0x1bf },
+	{ "gcc_qupv3_wrap2_s6_clk", &gcc.mux, 0x1c0 },
+	{ "gcc_qupv3_wrap2_s7_clk", &gcc.mux, 0x1c1 },
+	{ "gcc_qupv3_wrap_0_m_ahb_clk", &gcc.mux, 0x1c5 },
+	{ "gcc_qupv3_wrap_0_s_ahb_clk", &gcc.mux, 0x1c6 },
+	{ "gcc_qupv3_wrap_1_m_ahb_clk", &gcc.mux, 0x1a7 },
+	{ "gcc_qupv3_wrap_1_s_ahb_clk", &gcc.mux, 0x1a8 },
+	{ "gcc_qupv3_wrap_2_m_ahb_clk", &gcc.mux, 0x1b6 },
+	{ "gcc_qupv3_wrap_2_s_ahb_clk", &gcc.mux, 0x1b7 },
+	{ "gcc_sdcc2_ahb_clk", &gcc.mux, 0x199 },
+	{ "gcc_sdcc2_apps_clk", &gcc.mux, 0x198 },
+	{ "gcc_sdcc4_ahb_clk", &gcc.mux, 0x19c },
+	{ "gcc_sdcc4_apps_clk", &gcc.mux, 0x19b },
+	{ "gcc_ufs_phy_ahb_clk", &gcc.mux, 0x2ab },
+	{ "gcc_ufs_phy_axi_clk", &gcc.mux, 0x2aa },
+	{ "gcc_ufs_phy_ice_core_clk", &gcc.mux, 0x2b2 },
+	{ "gcc_ufs_phy_phy_aux_clk", &gcc.mux, 0x2b3 },
+	{ "gcc_ufs_phy_rx_symbol_0_clk", &gcc.mux, 0x2ae },
+	{ "gcc_ufs_phy_rx_symbol_1_clk", &gcc.mux, 0x2b4 },
+	{ "gcc_ufs_phy_tx_symbol_0_clk", &gcc.mux, 0x2ad },
+	{ "gcc_ufs_phy_unipro_core_clk", &gcc.mux, 0x2b1 },
+	{ "gcc_usb20_master_clk", &gcc.mux, 0x116 },
+	{ "gcc_usb20_mock_utmi_clk", &gcc.mux, 0x118 },
+	{ "gcc_usb20_sleep_clk", &gcc.mux, 0x117 },
+	{ "gcc_usb30_mp_master_clk", &gcc.mux, 0x10b },
+	{ "gcc_usb30_mp_mock_utmi_clk", &gcc.mux, 0x10d },
+	{ "gcc_usb30_mp_sleep_clk", &gcc.mux, 0x10c },
+	{ "gcc_usb30_prim_atb_clk", &gcc.mux, 0x17a },
+	{ "gcc_usb30_prim_master_clk", &gcc.mux, 0x179 },
+	{ "gcc_usb30_prim_mock_utmi_clk", &gcc.mux, 0x17c },
+	{ "gcc_usb30_prim_sleep_clk", &gcc.mux, 0x17b },
+	{ "gcc_usb30_sec_master_clk", &gcc.mux, 0x182 },
+	{ "gcc_usb30_sec_mock_utmi_clk", &gcc.mux, 0x184 },
+	{ "gcc_usb30_sec_sleep_clk", &gcc.mux, 0x183 },
+	{ "gcc_usb30_tert_master_clk", &gcc.mux, 0x18a },
+	{ "gcc_usb30_tert_mock_utmi_clk", &gcc.mux, 0x18c },
+	{ "gcc_usb30_tert_sleep_clk", &gcc.mux, 0x18b },
+	{ "gcc_usb3_mp_phy_aux_clk", &gcc.mux, 0x10e },
+	{ "gcc_usb3_mp_phy_com_aux_clk", &gcc.mux, 0x10f },
+	{ "gcc_usb3_mp_phy_pipe_0_clk", &gcc.mux, 0x110 },
+	{ "gcc_usb3_mp_phy_pipe_1_clk", &gcc.mux, 0x111 },
+	{ "gcc_usb3_prim_phy_aux_clk", &gcc.mux, 0x17d },
+	{ "gcc_usb3_prim_phy_com_aux_clk", &gcc.mux, 0x17e },
+	{ "gcc_usb3_prim_phy_pipe_clk", &gcc.mux, 0x17f },
+	{ "gcc_usb3_sec_phy_aux_clk", &gcc.mux, 0x185 },
+	{ "gcc_usb3_sec_phy_com_aux_clk", &gcc.mux, 0x186 },
+	{ "gcc_usb3_sec_phy_pipe_clk", &gcc.mux, 0x187 },
+	{ "gcc_usb3_tert_phy_aux_clk", &gcc.mux, 0x18d },
+	{ "gcc_usb3_tert_phy_com_aux_clk", &gcc.mux, 0x18e },
+	{ "gcc_usb3_tert_phy_pipe_clk", &gcc.mux, 0x18f },
+	{ "gcc_usb4_0_cfg_ahb_clk", &gcc.mux, 0x129 },
+	{ "gcc_usb4_0_dp0_clk", &gcc.mux, 0x126 },
+	{ "gcc_usb4_0_dp1_clk", &gcc.mux, 0x12f },
+	{ "gcc_usb4_0_master_clk", &gcc.mux, 0x121 },
+	{ "gcc_usb4_0_phy_p2rr2p_pipe_clk", &gcc.mux, 0x12e },
+	{ "gcc_usb4_0_phy_pcie_pipe_clk", &gcc.mux, 0x123 },
+	{ "gcc_usb4_0_phy_rx0_clk", &gcc.mux, 0x12a },
+	{ "gcc_usb4_0_phy_rx1_clk", &gcc.mux, 0x12b },
+	{ "gcc_usb4_0_phy_usb_pipe_clk", &gcc.mux, 0x128 },
+	{ "gcc_usb4_0_sb_if_clk", &gcc.mux, 0x122 },
+	{ "gcc_usb4_0_sys_clk", &gcc.mux, 0x124 },
+	{ "gcc_usb4_0_tmu_clk", &gcc.mux, 0x127 },
+	{ "gcc_usb4_0_uc_hrr_clk", &gcc.mux, 0x125 },
+	{ "gcc_usb4_1_cfg_ahb_clk", &gcc.mux, 0x140 },
+	{ "gcc_usb4_1_dp0_clk", &gcc.mux, 0x13d },
+	{ "gcc_usb4_1_dp1_clk", &gcc.mux, 0x146 },
+	{ "gcc_usb4_1_master_clk", &gcc.mux, 0x138 },
+	{ "gcc_usb4_1_phy_p2rr2p_pipe_clk", &gcc.mux, 0x145 },
+	{ "gcc_usb4_1_phy_pcie_pipe_clk", &gcc.mux, 0x13a },
+	{ "gcc_usb4_1_phy_rx0_clk", &gcc.mux, 0x141 },
+	{ "gcc_usb4_1_phy_rx1_clk", &gcc.mux, 0x142 },
+	{ "gcc_usb4_1_phy_usb_pipe_clk", &gcc.mux, 0x13f },
+	{ "gcc_usb4_1_sb_if_clk", &gcc.mux, 0x139 },
+	{ "gcc_usb4_1_sys_clk", &gcc.mux, 0x13b },
+	{ "gcc_usb4_1_tmu_clk", &gcc.mux, 0x13e },
+	{ "gcc_usb4_1_uc_hrr_clk", &gcc.mux, 0x13c },
+	{ "gcc_usb4_2_cfg_ahb_clk", &gcc.mux, 0x157 },
+	{ "gcc_usb4_2_dp0_clk", &gcc.mux, 0x154 },
+	{ "gcc_usb4_2_dp1_clk", &gcc.mux, 0x15d },
+	{ "gcc_usb4_2_master_clk", &gcc.mux, 0x14f },
+	{ "gcc_usb4_2_phy_p2rr2p_pipe_clk", &gcc.mux, 0x15c },
+	{ "gcc_usb4_2_phy_pcie_pipe_clk", &gcc.mux, 0x151 },
+	{ "gcc_usb4_2_phy_rx0_clk", &gcc.mux, 0x158 },
+	{ "gcc_usb4_2_phy_rx1_clk", &gcc.mux, 0x159 },
+	{ "gcc_usb4_2_phy_usb_pipe_clk", &gcc.mux, 0x156 },
+	{ "gcc_usb4_2_sb_if_clk", &gcc.mux, 0x150 },
+	{ "gcc_usb4_2_sys_clk", &gcc.mux, 0x152 },
+	{ "gcc_usb4_2_tmu_clk", &gcc.mux, 0x155 },
+	{ "gcc_usb4_2_uc_hrr_clk", &gcc.mux, 0x153 },
+	{ "gcc_video_ahb_clk", &gcc.mux, 0xcc },
+	{ "gcc_video_axi0_clk", &gcc.mux, 0xd2 },
+	{ "gcc_video_axi0c_clk", &gcc.mux, 0xd3 },
+	{ "gcc_video_axi1_clk", &gcc.mux, 0xd4 },
+	{ "gcc_video_xo_clk", &gcc.mux, 0xd5 },
+	{ "measure_only_pcie_3a_pipe_clk", &gcc.mux, 0x273 },
+	{ "measure_only_pcie_3b_pipe_clk", &gcc.mux, 0x281 },
+	{ "measure_only_pcie_4_pipe_clk", &gcc.mux, 0x29b },
+	{ "measure_only_pcie_5_pipe_clk", &gcc.mux, 0x28f },
+	{ "measure_only_pcie_6_pipe_clk", &gcc.mux, 0x2a7 },
+	{ "measure_only_qusb4phy_0_gcc_usb4_rx0_clk", &gcc.mux, 0x11e },
+	{ "measure_only_qusb4phy_0_gcc_usb4_rx1_clk", &gcc.mux, 0x11f },
+	{ "measure_only_qusb4phy_1_gcc_usb4_rx0_clk", &gcc.mux, 0x135 },
+	{ "measure_only_qusb4phy_1_gcc_usb4_rx1_clk", &gcc.mux, 0x136 },
+	{ "measure_only_qusb4phy_2_gcc_usb4_rx0_clk", &gcc.mux, 0x14c },
+	{ "measure_only_qusb4phy_2_gcc_usb4_rx1_clk", &gcc.mux, 0x14d },
+	{ "measure_only_ufs_phy_rx_symbol_0_clk", &gcc.mux, 0x2b0 },
+	{ "measure_only_ufs_phy_rx_symbol_1_clk", &gcc.mux, 0x2b6 },
+	{ "measure_only_ufs_phy_tx_symbol_0_clk", &gcc.mux, 0x2af },
+	{ "measure_only_usb3_phy_0_wrapper_gcc_usb30_pipe_clk", &gcc.mux, 0x119 },
+	{ "measure_only_usb3_phy_1_wrapper_gcc_usb30_pipe_clk", &gcc.mux, 0x130 },
+	{ "measure_only_usb3_phy_2_wrapper_gcc_usb30_pipe_clk", &gcc.mux, 0x147 },
+	{ "measure_only_usb3_uni_phy_mp_gcc_usb30_pipe_0_clk", &gcc.mux, 0x112 },
+	{ "measure_only_usb3_uni_phy_mp_gcc_usb30_pipe_1_clk", &gcc.mux, 0x114 },
+	{ "measure_only_usb4_0_phy_gcc_usb4_pcie_pipe_clk", &gcc.mux, 0x11d },
+	{ "measure_only_usb4_0_phy_gcc_usb4rtr_max_pipe_clk", &gcc.mux, 0x11c },
+	{ "measure_only_usb4_1_phy_gcc_usb4_pcie_pipe_clk", &gcc.mux, 0x134 },
+	{ "measure_only_usb4_1_phy_gcc_usb4rtr_max_pipe_clk", &gcc.mux, 0x133 },
+	{ "measure_only_usb4_2_phy_gcc_usb4_pcie_pipe_clk", &gcc.mux, 0x14b },
+	{ "measure_only_usb4_2_phy_gcc_usb4rtr_max_pipe_clk", &gcc.mux, 0x14a },
+
+	/* AV1E_CC entries */
+	{ "av1e_cc_ahb_clk", &av1e_cc, 0x8 },
+	{ "av1e_cc_av1e_core_axi_clk", &av1e_cc, 0x3 },
+	{ "av1e_cc_av1e_core_clk", &av1e_cc, 0x1 },
+	{ "av1e_cc_av1e_gdsc_noc_ahb_clk", &av1e_cc, 0x6 },
+	{ "av1e_cc_av1e_noc_ahb_clk", &av1e_cc, 0x7 },
+	{ "av1e_cc_av1e_noc_core_axi_clk", &av1e_cc, 0x5 },
+	{ "av1e_cc_av1e_noc_xo_clk", &av1e_cc, 0xa },
+	{ "measure_only_av1e_cc_av1e_cc_xo_clk", &av1e_cc, 0x9 },
+	{ "measure_only_av1e_cc_sleep_clk", &av1e_cc, 0xb },
+
+	/* CAM_CC entries */
+	{ "cam_cc_bps_ahb_clk", &cam_cc, 0x11 },
+	{ "cam_cc_bps_clk", &cam_cc, 0x12 },
+	{ "cam_cc_bps_fast_ahb_clk", &cam_cc, 0x10 },
+	{ "cam_cc_camnoc_axi_nrt_clk", &cam_cc, 0x34 },
+	{ "cam_cc_camnoc_axi_rt_clk", &cam_cc, 0x33 },
+	{ "cam_cc_camnoc_dcd_xo_clk", &cam_cc, 0x36 },
+	{ "cam_cc_camnoc_xo_clk", &cam_cc, 0x37 },
+	{ "cam_cc_cci_0_clk", &cam_cc, 0x2e },
+	{ "cam_cc_cci_1_clk", &cam_cc, 0x2f },
+	{ "cam_cc_core_ahb_clk", &cam_cc, 0x3a },
+	{ "cam_cc_cpas_ahb_clk", &cam_cc, 0x30 },
+	{ "cam_cc_cpas_bps_clk", &cam_cc, 0x13 },
+	{ "cam_cc_cpas_fast_ahb_clk", &cam_cc, 0x31 },
+	{ "cam_cc_cpas_ife_0_clk", &cam_cc, 0x1c },
+	{ "cam_cc_cpas_ife_1_clk", &cam_cc, 0x21 },
+	{ "cam_cc_cpas_ife_lite_clk", &cam_cc, 0x26 },
+	{ "cam_cc_cpas_ipe_nps_clk", &cam_cc, 0x15 },
+	{ "cam_cc_csi0phytimer_clk", &cam_cc, 0x9 },
+	{ "cam_cc_csi1phytimer_clk", &cam_cc, 0xc },
+	{ "cam_cc_csi4phytimer_clk", &cam_cc, 0xe },
+	{ "cam_cc_csid_clk", &cam_cc, 0x32 },
+	{ "cam_cc_csid_csiphy_rx_clk", &cam_cc, 0xb },
+	{ "cam_cc_csiphy0_clk", &cam_cc, 0xa },
+	{ "cam_cc_csiphy1_clk", &cam_cc, 0xd },
+	{ "cam_cc_csiphy4_clk", &cam_cc, 0xf },
+	{ "cam_cc_icp_ahb_clk", &cam_cc, 0x2d },
+	{ "cam_cc_icp_clk", &cam_cc, 0x2c },
+	{ "cam_cc_ife_0_clk", &cam_cc, 0x1b },
+	{ "cam_cc_ife_0_dsp_clk", &cam_cc, 0x1d },
+	{ "cam_cc_ife_0_fast_ahb_clk", &cam_cc, 0x1f },
+	{ "cam_cc_ife_1_clk", &cam_cc, 0x20 },
+	{ "cam_cc_ife_1_dsp_clk", &cam_cc, 0x22 },
+	{ "cam_cc_ife_1_fast_ahb_clk", &cam_cc, 0x24 },
+	{ "cam_cc_ife_lite_ahb_clk", &cam_cc, 0x29 },
+	{ "cam_cc_ife_lite_clk", &cam_cc, 0x25 },
+	{ "cam_cc_ife_lite_cphy_rx_clk", &cam_cc, 0x28 },
+	{ "cam_cc_ife_lite_csid_clk", &cam_cc, 0x27 },
+	{ "cam_cc_ipe_nps_ahb_clk", &cam_cc, 0x18 },
+	{ "cam_cc_ipe_nps_clk", &cam_cc, 0x14 },
+	{ "cam_cc_ipe_nps_fast_ahb_clk", &cam_cc, 0x19 },
+	{ "cam_cc_ipe_pps_clk", &cam_cc, 0x16 },
+	{ "cam_cc_ipe_pps_fast_ahb_clk", &cam_cc, 0x1a },
+	{ "cam_cc_jpeg_clk", &cam_cc, 0x2a },
+	{ "cam_cc_mclk0_clk", &cam_cc, 0x1 },
+	{ "cam_cc_mclk1_clk", &cam_cc, 0x2 },
+	{ "cam_cc_mclk2_clk", &cam_cc, 0x3 },
+	{ "cam_cc_mclk3_clk", &cam_cc, 0x4 },
+	{ "cam_cc_mclk4_clk", &cam_cc, 0x5 },
+	{ "cam_cc_mclk5_clk", &cam_cc, 0x6 },
+	{ "cam_cc_mclk6_clk", &cam_cc, 0x7 },
+	{ "cam_cc_mclk7_clk", &cam_cc, 0x8 },
+	{ "measure_only_cam_cc_gdsc_clk", &cam_cc, 0x3b },
+	{ "measure_only_cam_cc_sleep_clk", &cam_cc, 0x3c },
+
+	/* DISP_CC entries */
+	{ "disp_cc_esync0_clk", &disp_cc, 0x37 },
+	{ "disp_cc_esync1_clk", &disp_cc, 0x38 },
+	{ "disp_cc_mdss_accu_shift_clk", &disp_cc, 0x4c },
+	{ "disp_cc_mdss_ahb1_clk", &disp_cc, 0x3c },
+	{ "disp_cc_mdss_ahb_clk", &disp_cc, 0x35 },
+	{ "disp_cc_mdss_byte0_clk", &disp_cc, 0x15 },
+	{ "disp_cc_mdss_byte0_intf_clk", &disp_cc, 0x16 },
+	{ "disp_cc_mdss_byte1_clk", &disp_cc, 0x17 },
+	{ "disp_cc_mdss_byte1_intf_clk", &disp_cc, 0x18 },
+	{ "disp_cc_mdss_dptx0_aux_clk", &disp_cc, 0x21 },
+	{ "disp_cc_mdss_dptx0_link_clk", &disp_cc, 0x1b },
+	{ "disp_cc_mdss_dptx0_link_dpin_clk", &disp_cc, 0x54 },
+	{ "disp_cc_mdss_dptx0_link_intf_clk", &disp_cc, 0x1d },
+	{ "disp_cc_mdss_dptx0_pixel0_clk", &disp_cc, 0x1f },
+	{ "disp_cc_mdss_dptx0_pixel1_clk", &disp_cc, 0x20 },
+	{ "disp_cc_mdss_dptx0_usb_router_link_intf_clk", &disp_cc, 0x1c },
+	{ "disp_cc_mdss_dptx1_aux_clk", &disp_cc, 0x28 },
+	{ "disp_cc_mdss_dptx1_link_clk", &disp_cc, 0x24 },
+	{ "disp_cc_mdss_dptx1_link_dpin_clk", &disp_cc, 0x55 },
+	{ "disp_cc_mdss_dptx1_link_intf_clk", &disp_cc, 0x26 },
+	{ "disp_cc_mdss_dptx1_pixel0_clk", &disp_cc, 0x22 },
+	{ "disp_cc_mdss_dptx1_pixel1_clk", &disp_cc, 0x23 },
+	{ "disp_cc_mdss_dptx1_usb_router_link_intf_clk", &disp_cc, 0x25 },
+	{ "disp_cc_mdss_dptx2_aux_clk", &disp_cc, 0x2f },
+	{ "disp_cc_mdss_dptx2_link_clk", &disp_cc, 0x2b },
+	{ "disp_cc_mdss_dptx2_link_dpin_clk", &disp_cc, 0x56 },
+	{ "disp_cc_mdss_dptx2_link_intf_clk", &disp_cc, 0x2d },
+	{ "disp_cc_mdss_dptx2_pixel0_clk", &disp_cc, 0x29 },
+	{ "disp_cc_mdss_dptx2_pixel1_clk", &disp_cc, 0x2a },
+	{ "disp_cc_mdss_dptx2_usb_router_link_intf_clk", &disp_cc, 0x2c },
+	{ "disp_cc_mdss_dptx3_aux_clk", &disp_cc, 0x33 },
+	{ "disp_cc_mdss_dptx3_link_clk", &disp_cc, 0x31 },
+	{ "disp_cc_mdss_dptx3_link_dpin_clk", &disp_cc, 0x57 },
+	{ "disp_cc_mdss_dptx3_link_intf_clk", &disp_cc, 0x32 },
+	{ "disp_cc_mdss_dptx3_pixel0_clk", &disp_cc, 0x30 },
+	{ "disp_cc_mdss_esc0_clk", &disp_cc, 0x19 },
+	{ "disp_cc_mdss_esc1_clk", &disp_cc, 0x1a },
+	{ "disp_cc_mdss_mdp1_clk", &disp_cc, 0x39 },
+	{ "disp_cc_mdss_mdp_clk", &disp_cc, 0x12 },
+	{ "disp_cc_mdss_mdp_lut1_clk", &disp_cc, 0x3a },
+	{ "disp_cc_mdss_mdp_lut_clk", &disp_cc, 0x13 },
+	{ "disp_cc_mdss_non_gdsc_ahb_clk", &disp_cc, 0x3d },
+	{ "disp_cc_mdss_pclk0_clk", &disp_cc, 0xf },
+	{ "disp_cc_mdss_pclk1_clk", &disp_cc, 0x10 },
+	{ "disp_cc_mdss_pclk2_clk", &disp_cc, 0x11 },
+	{ "disp_cc_mdss_rscc_ahb_clk", &disp_cc, 0x3f },
+	{ "disp_cc_mdss_rscc_vsync_clk", &disp_cc, 0x3e },
+	{ "disp_cc_mdss_vsync1_clk", &disp_cc, 0x3b },
+	{ "disp_cc_mdss_vsync_clk", &disp_cc, 0x14 },
+	{ "disp_cc_osc_clk", &disp_cc, 0x36 },
+	{ "measure_only_disp_cc_sleep_clk", &disp_cc, 0x4d },
+	{ "measure_only_disp_cc_xo_clk", &disp_cc, 0x4b },
+
+	/* EVA_CC entries */
+	{ "eva_cc_mvs0_clk", &eva_cc, 0x4 },
+	{ "eva_cc_mvs0_freerun_clk", &eva_cc, 0x5 },
+	{ "eva_cc_mvs0_shift_clk", &eva_cc, 0xa },
+	{ "eva_cc_mvs0c_clk", &eva_cc, 0x1 },
+	{ "eva_cc_mvs0c_freerun_clk", &eva_cc, 0x2 },
+	{ "eva_cc_mvs0c_shift_clk", &eva_cc, 0xb },
+	{ "measure_only_eva_cc_ahb_clk", &eva_cc, 0x8 },
+	{ "measure_only_eva_cc_sleep_clk", &eva_cc, 0xc },
+	{ "measure_only_eva_cc_xo_clk", &eva_cc, 0x9 },
+
+	/* GPU_CC entries */
+	{ "gpu_cc_ahb_clk", &gpu_cc, 0x17 },
+	{ "gpu_cc_cx_accu_shift_clk", &gpu_cc, 0x24 },
+	{ "gpu_cc_cx_ff_clk", &gpu_cc, 0x20 },
+	{ "gpu_cc_cx_gmu_clk", &gpu_cc, 0x1d },
+	{ "gpu_cc_cxo_clk", &gpu_cc, 0x1e },
+	{ "gpu_cc_demet_clk", &gpu_cc, 0x10 },
+	{ "gpu_cc_dpm_clk", &gpu_cc, 0x25 },
+	{ "gpu_cc_freq_measure_clk", &gpu_cc, 0xf },
+	{ "gpu_cc_gx_accu_shift_clk", &gpu_cc, 0x15 },
+	{ "gpu_cc_gx_acd_ahb_ff_clk", &gpu_cc, 0x13 },
+	{ "gpu_cc_gx_ahb_ff_clk", &gpu_cc, 0x12 },
+	{ "gpu_cc_gx_gmu_clk", &gpu_cc, 0x11 },
+	{ "gpu_cc_gx_rcg_ahb_ff_clk", &gpu_cc, 0x14 },
+	{ "gpu_cc_hub_aon_clk", &gpu_cc, 0x2c },
+	{ "gpu_cc_hub_cx_int_clk", &gpu_cc, 0x1f },
+	{ "gpu_cc_memnoc_gfx_clk", &gpu_cc, 0x21 },
+	{ "gpu_cc_rscc_hub_aon_clk", &gpu_cc, 0x2b },
+	{ "gpu_cc_sleep_clk", &gpu_cc, 0x1b },
+	{ "measure_only_gpu_cc_cb_clk", &gpu_cc, 0x2a },
+	{ "measure_only_gpu_cc_cxo_aon_clk", &gpu_cc, 0xe },
+	{ "measure_only_gpu_cc_rscc_xo_aon_clk", &gpu_cc, 0xd },
+
+	/* VIDEO_CC entries */
+	{ "video_cc_mvs0c_clk", &video_cc, 0x1 },
+	{ "video_cc_mvs0c_freerun_clk", &video_cc, 0x2 },
+	{ "video_cc_mvs0c_slp_stg_clk", &video_cc, 0x3 },
+	{ "video_cc_mvs0_clk", &video_cc, 0x4 },
+	{ "video_cc_mvs0_freerun_clk", &video_cc, 0x5 },
+	{ "video_cc_mvs0_slp_stg_clk", &video_cc, 0x6 },
+	{ "video_cc_mvs0_freerun_slp_stg_clk", &video_cc, 0x7 },
+	{ "video_cc_mvs1_clk", &video_cc, 0x8 },
+	{ "video_cc_mvs1_freerun_clk", &video_cc, 0x9 },
+	{ "video_cc_mvs1_slp_stg_clk", &video_cc, 0xa },
+	{ "video_cc_mvs1_freerun_slp_stg_clk", &video_cc, 0xb },
+	{ "video_cc_ahb_clk", &video_cc, 0xc },
+	{ "video_cc_xo_clk", &video_cc, 0xd },
+	{ "video_cc_mvs0_shift_clk", &video_cc, 0xe },
+	{ "video_cc_mvs1_shift_clk", &video_cc, 0xf },
+	{ "video_cc_mvs0c_shift_clk", &video_cc, 0x10 },
+	{ "video_cc_sleep_clk", &video_cc, 0x11 },
+
+	{}
+};
+
+struct debugcc_platform glymur_debugcc = {
+	"glymur",
+	glymur_clocks,
+};
diff --git a/hamoa.c b/platforms/hamoa.c
similarity index 99%
rename from hamoa.c
rename to platforms/hamoa.c
index cbd327b..e4d5a08 100644
--- a/hamoa.c
+++ b/platforms/hamoa.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/ipq8064.c b/platforms/ipq8064.c
similarity index 99%
rename from ipq8064.c
rename to platforms/ipq8064.c
index ffbc723..e9c8a0c 100644
--- a/ipq8064.c
+++ b/platforms/ipq8064.c
@@ -9,7 +9,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 #define GCC_PHYS		0x900000
 
diff --git a/milos.c b/platforms/milos.c
similarity index 99%
rename from milos.c
rename to platforms/milos.c
index 1678770..04c3d85 100644
--- a/milos.c
+++ b/platforms/milos.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/msm8936.c b/platforms/msm8936.c
similarity index 99%
rename from msm8936.c
rename to platforms/msm8936.c
index ab84b8b..8035667 100644
--- a/msm8936.c
+++ b/platforms/msm8936.c
@@ -12,7 +12,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 #define GCC_BASE			0x01800000
 #define GCC_SIZE			0x80000
diff --git a/msm8974.c b/platforms/msm8974.c
similarity index 99%
rename from msm8974.c
rename to platforms/msm8974.c
index eb78e82..0aa4e60 100644
--- a/msm8974.c
+++ b/platforms/msm8974.c
@@ -13,7 +13,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/msm8994.c b/platforms/msm8994.c
similarity index 99%
rename from msm8994.c
rename to platforms/msm8994.c
index 7d9e42d..59435a0 100644
--- a/msm8994.c
+++ b/platforms/msm8994.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/msm8996.c b/platforms/msm8996.c
similarity index 99%
rename from msm8996.c
rename to platforms/msm8996.c
index aefe36b..385b452 100644
--- a/msm8996.c
+++ b/platforms/msm8996.c
@@ -12,7 +12,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 #define GCC_BASE			0x300000
 #define GCC_SIZE			0x8f014
diff --git a/msm8998.c b/platforms/msm8998.c
similarity index 99%
rename from msm8998.c
rename to platforms/msm8998.c
index 1a0940d..129732a 100644
--- a/msm8998.c
+++ b/platforms/msm8998.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/qcm2290.c b/platforms/qcm2290.c
similarity index 99%
rename from qcm2290.c
rename to platforms/qcm2290.c
index cd2f220..5f403b6 100644
--- a/qcm2290.c
+++ b/platforms/qcm2290.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/qcs404.c b/platforms/qcs404.c
similarity index 99%
rename from qcs404.c
rename to platforms/qcs404.c
index adf6567..eeeb5a5 100644
--- a/qcs404.c
+++ b/platforms/qcs404.c
@@ -13,7 +13,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 #define GCC_BASE	0x01800000
 #define GCC_SIZE	0x80000
diff --git a/sc7180.c b/platforms/sc7180.c
similarity index 99%
rename from sc7180.c
rename to platforms/sc7180.c
index 4213731..8276f03 100644
--- a/sc7180.c
+++ b/platforms/sc7180.c
@@ -9,7 +9,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sc8280xp.c b/platforms/sc8280xp.c
similarity index 99%
rename from sc8280xp.c
rename to platforms/sc8280xp.c
index a6c2d1e..fac434d 100644
--- a/sc8280xp.c
+++ b/platforms/sc8280xp.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sdm845.c b/platforms/sdm845.c
similarity index 99%
rename from sdm845.c
rename to platforms/sdm845.c
index 6e282e0..b2e081f 100644
--- a/sdm845.c
+++ b/platforms/sdm845.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 #define GCC_BASE	0x100000
 #define GCC_SIZE	0x1f0000
diff --git a/sm6115.c b/platforms/sm6115.c
similarity index 99%
rename from sm6115.c
rename to platforms/sm6115.c
index 0e75951..e8d23ed 100644
--- a/sm6115.c
+++ b/platforms/sm6115.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm6125.c b/platforms/sm6125.c
similarity index 99%
rename from sm6125.c
rename to platforms/sm6125.c
index 18d215b..e723760 100644
--- a/sm6125.c
+++ b/platforms/sm6125.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm6350.c b/platforms/sm6350.c
similarity index 99%
rename from sm6350.c
rename to platforms/sm6350.c
index 352769b..d46be5d 100644
--- a/sm6350.c
+++ b/platforms/sm6350.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm6375.c b/platforms/sm6375.c
similarity index 99%
rename from sm6375.c
rename to platforms/sm6375.c
index c1af761..d98f624 100644
--- a/sm6375.c
+++ b/platforms/sm6375.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm8150.c b/platforms/sm8150.c
similarity index 99%
rename from sm8150.c
rename to platforms/sm8150.c
index 07c9270..67c488c 100644
--- a/sm8150.c
+++ b/platforms/sm8150.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm8250.c b/platforms/sm8250.c
similarity index 99%
rename from sm8250.c
rename to platforms/sm8250.c
index 01f91c2..be79995 100644
--- a/sm8250.c
+++ b/platforms/sm8250.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm8350.c b/platforms/sm8350.c
similarity index 99%
rename from sm8350.c
rename to platforms/sm8350.c
index e6519f7..463564d 100644
--- a/sm8350.c
+++ b/platforms/sm8350.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {
diff --git a/sm8450.c b/platforms/sm8450.c
similarity index 99%
rename from sm8450.c
rename to platforms/sm8450.c
index 9b6b95e..2a67e4b 100644
--- a/sm8450.c
+++ b/platforms/sm8450.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 /* Enabling APSS can cause Bus error issues, so do not enable them by default */
 #define ENABLE_SM8450_APSS_CLOCKS 0
diff --git a/sm8550.c b/platforms/sm8550.c
similarity index 99%
rename from sm8550.c
rename to platforms/sm8550.c
index 7c14c34..ae81cd7 100644
--- a/sm8550.c
+++ b/platforms/sm8550.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 /* Enabling APSS can cause Bus error issues, so do not enable them by default */
 #define ENABLE_SM8550_APSS_CLOCKS 0
diff --git a/sm8650.c b/platforms/sm8650.c
similarity index 99%
rename from sm8650.c
rename to platforms/sm8650.c
index aa0da7e..375d985 100644
--- a/sm8650.c
+++ b/platforms/sm8650.c
@@ -10,7 +10,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "debugcc.h"
+#include <debugcc.h>
 
 static struct gcc_mux gcc = {
 	.mux = {