JTAG DPI tested in CI

[marnovandermaas]

Add a CI job that makes sure there are no regressions in JTAG DPI functionality. The debug module is already tested on FPGA using the system bus access to program the tests.

This JTAG DPI test should also run in legacy mode to make sure that there are no regressions with the legacy debug module.

[marnovandermaas]

Need to build OpenOCD with remote bitbang enabled: https://openocd.org/doc/html/Debug-Adapter-Configuration.html

[marnovandermaas]

Then follow the JTAG DPI instructions here: https://lowrisc.github.io/sonata-system/doc/ip/dm.html

[marnovandermaas]

To check system bus access works you can also use a command like: util/mem_helper.sh load_program -e sw/cheri/build/checks/uart_check -t util/verilator-openocd-cfg.tcl and then verify that uart0.log has the expected content.