Description
A user reported a shader that failed DXIL validation when targeting SM 6.9 for a shader that worked when targeting SM 6.8. The shader has a likely unnoticed logic error (a dead loop) that was optimized away in SM 6.8 due to evaluating scalarized constant operations. When targeting SM 6.9, DXC fails to constant-fold the vector reduce operation, which leaves the dead loop with no exit causing a DXIL validation error.
Steps to Reproduce
RWStructuredBuffer<uint> Out;
[numthreads(1, 1, 1)]
void main(uint3 dtid : SV_DispatchThreadID) {
uint4 mask = uint4(0, 0, 0, 0);
uint4 lane = uint4(1, 2, 4, 8);
uint count = 0;
[loop]
while (any(mask & lane)) {
mask ^= uint4(0, 0, 0, 0);
count += 1;
}
Out[dtid.x] = count;
}
Compiler Explorer
Actual Behavior
While this code is clearly a logic error, it shouldn't generate invalid DXIL.
Environment
- DXC version: 1.10*
- Host Operating System: Any
Description
A user reported a shader that failed DXIL validation when targeting SM 6.9 for a shader that worked when targeting SM 6.8. The shader has a likely unnoticed logic error (a dead loop) that was optimized away in SM 6.8 due to evaluating scalarized constant operations. When targeting SM 6.9, DXC fails to constant-fold the vector reduce operation, which leaves the dead loop with no exit causing a DXIL validation error.
Steps to Reproduce
Compiler Explorer
Actual Behavior
While this code is clearly a logic error, it shouldn't generate invalid DXIL.
Environment