audio: component: wait for remote component reset to complete

comp_reset_remote() sent the cross-core IDC_MSG_RESET with IDC_BLOCKING,
which only waits CONFIG_IDC_TIMEOUT_US (15 ms) before returning -EAGAIN.
A data-processing (DP) module reset runs schedule_task_cancel() ->
k_thread_join() on the target core and cannot return until the DP thread
finishes its in-flight process() call. That call is bounded but can be
long during a codec cold-start (a deferred avcodec_open2 table build, up
to ~1.4 s for aac, or the first decode after it), far exceeding the IDC
timeout.

When it timed out the component was left un-reset (not COMP_STATE_READY),
so pipeline_reset() failed and the host-side free was then refused with
an invalid-state error and the remote core could not be disabled - every
teardown wedged until reboot.

The caller (pipeline_reset -> host) depends on the reset actually being
finished before it frees the component and powers down the remote core,
so the reset must stay synchronous. Add IDC_BLOCKING_NO_TIMEOUT, which is
IDC_BLOCKING but waits K_FOREVER for the handler to complete, and use it
for comp_reset_remote(). A normal end-of-stream teardown joins an idle DP
thread and returns immediately, so this only waits when it must.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

Author: lrgirdwo

posix/include/rtos/idc.h

@@ -28,6 +28,9 @@
 /** \brief IDC send non-blocking flag. */
 #define IDC_NON_BLOCKING	1
 
+/** \brief IDC send blocking flag, wait for completion without timing out. */
+#define IDC_BLOCKING_NO_TIMEOUT	4
+
 /** \brief IDC send core power up flag. */
 #define IDC_POWER_UP		2
 

src/idc/zephyr_idc.c

@@ -157,7 +157,7 @@ int idc_send_msg(struct idc_msg *msg, uint32_t mode)
 	work->priority = CONFIG_EDF_THREAD_PRIORITY;
 	work->deadline = 0;
 	work->handler = idc_handler;
-	work->sync = mode == IDC_BLOCKING;
+	work->sync = mode == IDC_BLOCKING || mode == IDC_BLOCKING_NO_TIMEOUT;
 
 	if (msg->payload) {
 		idc_send_memcpy_err = memcpy_s(payload->data, sizeof(payload->data),
@@ -189,6 +189,13 @@ int idc_send_msg(struct idc_msg *msg, uint32_t mode)
 			/* message was sent and executed successfully, get status code */
 			ret = idc_msg_status_get(msg->core);
 		break;
+	case IDC_BLOCKING_NO_TIMEOUT:
+		/* wait for completion; the handler is bounded but may exceed
+		 * CONFIG_IDC_TIMEOUT_US (see IDC_BLOCKING_NO_TIMEOUT) */
+		ret = k_p4wq_wait(work, K_FOREVER);
+		if (!ret)
+			ret = idc_msg_status_get(msg->core);
+		break;
 	case IDC_POWER_UP:
 	case IDC_NON_BLOCKING:
 	default:

src/include/sof/audio/component_ext.h

@@ -405,7 +405,22 @@ static inline int comp_reset_remote(struct comp_dev *dev)
 	struct idc_msg msg = { IDC_MSG_RESET,
 		IDC_MSG_RESET_EXT(dev->ipc_config.id), dev->ipc_config.core, };
 
-	return idc_send_msg(&msg, IDC_BLOCKING);
+	/*
+	 * Blocking, and waiting for actual completion (no timeout): the caller
+	 * (pipeline_reset -> host) depends on the reset being finished before it
+	 * frees the component and powers down the remote core. A DP decoder's
+	 * reset runs schedule_task_cancel() -> k_thread_join() on that core, which
+	 * only returns once the DP thread finishes its in-flight process() call.
+	 * That call is bounded but can be long during codec cold-start (a deferred
+	 * avcodec_open2 table build, ~1.4 s for aac, or the first decode after it),
+	 * exceeding CONFIG_IDC_TIMEOUT_US. A plain IDC_BLOCKING would give up at
+	 * that timeout (-EAGAIN) while the reset is still running remotely, leaving
+	 * the component un-reset; pipeline_reset() then fails and the subsequent
+	 * free is refused (invalid state) / the core cannot be disabled, wedging
+	 * every teardown until reboot. A normal end-of-stream teardown joins an
+	 * idle DP thread and returns immediately, so this only waits when it must.
+	 */
+	return idc_send_msg(&msg, IDC_BLOCKING_NO_TIMEOUT);
 }
 
 /**

zephyr/include/rtos/idc.h

@@ -28,6 +28,15 @@
 /** \brief IDC send non-blocking flag. */
 #define IDC_NON_BLOCKING	1
 
+/** \brief IDC send blocking flag, wait for completion without timing out.
+ * Like IDC_BLOCKING but waits (K_FOREVER) for the handler to finish rather
+ * than only CONFIG_IDC_TIMEOUT_US. For remote ops whose completion the
+ * caller depends on and which are bounded but can exceed the IDC timeout
+ * (e.g. a DP component reset that joins a decoder thread mid codec
+ * cold-start).
+ */
+#define IDC_BLOCKING_NO_TIMEOUT	4
+
 /** \brief IDC send core power up flag. */
 #define IDC_POWER_UP		2