From 8894bf58913c7abbf91e3ccde22c9cfd7de342e9 Mon Sep 17 00:00:00 2001 From: Vivek Kumar Date: Mon, 14 Sep 2026 15:00:31 +0530 Subject: [PATCH] arm64: dts: qcom: qcs6490-vicharak-axon-mini: enable HDMI output Enable the HDMI output path on the Vicharak Axon Mini board. Add the CH7218A HDMI bridge and HDMI connector nodes, and connect the MDSS eDP output to the HDMI bridge. Signed-off-by: Vivek Kumar --- .../dts/qcom/qcs6490-vicharak-axon-mini.dts | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts b/arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts index 4f2e0109f49bf..c39567b7ea6ee 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts @@ -74,6 +74,47 @@ }; }; + hdmi-bridge { + compatible = "chrontel,ch7218a"; + + vdd-supply = <&vreg_l16b_1p1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + hdmi_bridge_in: endpoint { + remote-endpoint = <&mdss_edp_out>; + }; + }; + + port@1 { + reg = <1>; + + hdmi_bridge_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + label = "HDMI"; + type = "d"; + + hpd-gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_bridge_out>; + }; + }; + }; + reserved-memory { xbl_mem: xbl@80700000 { reg = <0x0 0x80700000 0x0 0x100000>; @@ -651,6 +692,26 @@ status = "disabled"; }; +&mdss { + status = "okay"; +}; + +&mdss_edp { + status = "okay"; +}; + +&mdss_edp_out { + data-lanes = <0 1 2 3>; + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; + remote-endpoint = <&hdmi_bridge_in>; +}; + +&mdss_edp_phy { + status = "okay"; + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; +}; + &pcie0 { perst-gpios = <&tlmm 87 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 89 GPIO_ACTIVE_HIGH>; @@ -969,6 +1030,11 @@ }; /* pinctrl */ +&edp_hot_plug_det { + function = "gpio"; + bias-disable; +}; + &pcie0_clkreq_n { bias-pull-up; drive-strength = <2>;