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Apoorva Singh - Task 7 Submission: Analog Lock-in Amplifier. - #16

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Apoorva Singh - Task 7 Submission: Analog Lock-in Amplifier.#16
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Submission for eSim Semester Long Internship - Autumn 2026, Task 7.

Project: Analog Lock-in Amplifier for Weak Signal Detection

Contents of this Pull Request:

LockInAmplifier_PCB.zip: Contains the complete eSim workspace (.kicad_sch, .kicad_pcb, project files), alongside the generated manufacturing data (Gerbers and Excellon Drill files).

abstract_SYNOPSIS_LOGIC_AMP_PCB.pdf: The final project report detailing the phase-sensitive detection theory, footprint assignments, routing methodology, and final visual documentation.

Design Highlights:

Dual-layer (F.Cu and B.Cu) routing for high component density.

Perimeter "ring road" routing strategy to mitigate short-circuits.

Successfully verified with 0 DRC Violations, 0 Unconnected Pads, and 0 Footprint Errors.

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