[AMDGPU] Use native atomics for reductions instead of runtime reduce_* helpers - #843
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…elpers optimized_reduction() on AMDGPU lowered every reduction to a call into a runtime reduce_* helper (reduce_add_i32, reduce_add_f32, reduce_min_f32, ...). Those helpers take addrspace(0) pointers, so a global SNode destination had to be routed through a flat pointer for the call, and the f32-add helper path did not lower to the hardware float atomic. Remove the AMDGPU optimized_reduction override. Reduction atomics now fall through to real_type_atomic() / integral_type_atomic(), which emit native LLVM atomics (AtomicRMW / FAdd / FMin / FMax) at "agent" syncscope via kernel_atomic_syncscope(). On gfx942 these lower to hardware global_atomic_* instructions and preserve the destination address space. Verified on gfx942 (MI300X): reduction correctness for i32 add/min/max/and/or/xor and f32 add/min/max matches NumPy. A contended f32 sum reduction, which regressed ~1000x when emitted as a default-syncscope atomicrmw fadd (software CAS lowering), runs at the native agent-scoped hardware-atomic speed via this path. Co-authored-by: Cursor <cursoragent@cursor.com>
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Summary
On AMDGPU,
optimized_reduction()lowered every reduction (+=,atomic_min,atomic_max, ...) to a call into a runtimereduce_*helper (reduce_add_i32,reduce_add_f32,reduce_min_f32, ...). Those helpers takeaddrspace(0)pointers, so a global SNode destination was routed through a flat pointer for the call, and the f32-add helper path did not lower to the hardware float atomic.This PR removes the AMDGPU
optimized_reduction()override. Reduction atomics now fall through the standard atomic visitor toreal_type_atomic()/integral_type_atomic(), which already emit native LLVM atomics (AtomicRMW/FAdd/FMin/FMax) at"agent"syncscope viakernel_atomic_syncscope(). On gfx942 these lower to hardwareglobal_atomic_*instructions and preserve the destination address space.This is a simplification / dependency removal — it deletes AMDGPU-specific reduction codegen in favor of the shared LLVM atomic path already used by the CPU and CUDA backends. This also aligns with the project's broader move toward native float atomics (cf. the separate Metal-backend migration in #788), and is a cleaner base for upcoming AMDGPU address-space work.
Changes
quadrants/codegen/amdgpu/codegen_amdgpu.cpp: removeoptimized_reduction()override (+9/-27), replaced by an explanatory comment. Single-file change.Validation (gfx942 / MI300X)
atomicrmw fadd ... syncscope("agent"); i32 add/min/max likewise; no@reduce_*helper call.atomicrmw faddregresses ~1000x due to software CAS lowering; this path correctly uses"agent"scope and avoids that.Made with Cursor