FireCPU 7501 - MOS 7501 (8501) CPU Replacement Project

The purpose of this project is to interface a standard MOS 6502 CPU with a system designed for a MOS 7501 (8501) CPU using a CPLD (Atmel/Microchip ATF1504AS-10AU100). The CPLD handles the necessary logic for bus tristate and implements the CPU I/O port registers, including both the data direction register (DDR) and the data (DATA) register. Recommended is to use 6502A version that supports 2MHz speeds.

You do not need to synthesize anything to use FireCPU 7501. This repository already ships ready-to-flash CPLD images (program.svf / cpu7501.jed, plus erase.svf) and the complete PCB manufacturing files in hardware/. Synthesis from the CUPL source is only needed if you want to modify the design.

Current status

• FireCPU 7501 has been tested to fully work with the following:
  • Metamerism (demo)
  • Rocket Science (demo)
  • Haziasan (demo)
  • Pets Rescue (game)
  • Elite+4 Flicer free (game)
  • diSCKetten #1 (disk magazine)
  • Slipstream (game)
  • JiffyDOS
  • Krill loader (used by demos above)
  • Datasette and tape save / load
  • Turbo tape 64k (file name corrupts, but same happens with real 8501)
  • Novaload tapes with 1531
  • Dream Time 2K17 (picture gallery demo)
  • 1551 disk drive
  • TCBM2SD
  • C264 Magic cart
  • PI1541, also with JiffyDOS

Features

• 6502 CPU Integration: Connects a standard MOS 6502 CPU to the system bus, simulating the behavior of the MOS 7501/8501 CPU.
• I/O Port Implementation: Includes a 7-bit I/O port (PIO) with DDR and DATA registers. Bit 5 of both registers always reads back as 0.
• Bus Tristate Logic: Manages the tristate logic for the data and address buses, setting them to high impedance according to AEC and GATE IN signals.
• Compatibility Enhancements: Ensures compatibility with the original 7501 CPU, resolving common issues with other replacements.
• Expandable Design: Uses 53 of 64 macrocells and 62 of 64 I/O pins. The ~11 spare macrocells leave room for additional logic (e.g. adapting to MOS 6510T or MOS 8502), but note that only ~2 I/O pins are free, so any adaptation needing more pins would not fit.
• RESET fix: Many software over 16k of size disable ROM to gain access to RAM under BASIC and KERNAL. When machine is RESET, the ROM bank switching is RESET back to BASIC+KERNAL, but TED never swaps selection back to ROM, preventing CPU to run KERNEL code at boot. FireCPU 7501 fixes this by enabling ROM during RESET.
• JiffyDOS compatible: Tests show that FireCPU 7501 also works with JiffyDOS, when using real 1541 drive, or with Pi1541.

Technical Details

• GATE IN Pin: Implements the special GATE IN pin functionality working together with AEC, latching AEC into a "gated AEC" state.
• High Impedance State: Sets the data and address buses to high impedance when AEC not active, or gated AEC active.
• CUPL Code: Written in CUPL, the code handles the interface logic between the 6502 CPU and the system bus.
• I/O Port DDR: Opposed to some other replacements using hard-coded DDR, real DDR register is implemented that fixes many issues with fast loaders (both tape and disk).
• PHI2 timing: The I/O port registers latch on the falling edge of PHI2, not on PHI1. The real 8501 samples its port input at PHI1, but a fast (~10ns) CPLD latches before the bus has settled for the cycle, so PHI1 was tried and fails. Falling PHI2 is the only edge where the 6502 write data is reliably valid.

Hardware accuracy

FireCPU 7501 was cross-checked against the MOS 8501 die dissection by ttlworks on the 6502.org forum (thread t=6617), which confirms several behaviors this design matches:

• I/O port writes drive no data. Writes to $0000/$0001 pull R/W low but leave the data bus in high impedance — exactly what the die shows ("the data bus drivers are disabled during IO port writes").
• Port bit 5 is real silicon that reads back 0. On the die, P5's I/O block is present but cut down; its data and DDR bits always read 0. FireCPU reproduces this.
• Port bit map: P0 serial data out, P1 serial clock out, P2 serial ATN out, P3 cassette motor, P4 cassette read, P5 unused, P6 serial clock in, P7 serial data in.

File Overview

• cpu7501.pld: This CUPL file contains the logic for interfacing the 6502 CPU with the system designed for a 7501 CPU. It includes input and output pins definitions, buried logic terms, and field definitions for the CUPL code.
• cpu7501.fit: Atmel fitter report, contains expanded logic and pin-out of CPLD and report of used macrocells and blocks.
• cpu7501.jed: Pre-synthesized JED file that can be flashed directly to the CPLD chip.
• erase.svf: Serial Vector Format file to erase ATF1504AS with OpenOCD etc.
• program.svf: Pre-synthesized file in Serial Vector Format that can be flashed to the CPLD with OpenOCD etc.

Note on generated files: cpu7501.jed, program.svf, cpu7501.fit, cpu7501.io and cpu7501.doc are all outputs generated from cpu7501.pld. If you change the .pld, regenerate them before tagging a release. The committed artifacts were built with WinCUPL (cupl.exe) and the Atmel Prochip fit1504 fitter — record the exact tool versions you use, since the WinCUPL-bundled fitter does not produce a working FireCPU.

PCB / hardware files

The hardware/ folder contains everything needed to order and assemble a board:

• firecpu7501_gerbers.zip — Gerber + drill files for PCB fabrication
• firecpu7501_schematics.pdf — schematics
• bom.csv — bill of materials
• positions.csv, designators.csv — component positions and designators for assembly
• netlist.ipc — IPC-356 netlist

Ready-made products

If you do not want to build one and rather get a ready-made product, I have a limited stock at Sellmyretro.

Prerequisites

To program a board using the files already in this repository, you only need:

• Programming cable hardware (FT232-based JTAG, or Atmel's own ATDH1150 USB cable)
• A flashing tool: OpenOCD (writes erase.svf + program.svf) or ATMISP (flashes cpu7501.jed)

To rebuild the CPLD logic from source (optional — only if you modify the design):

• WinCUPL — the UI is unreliable on modern Windows, but compilation works from the command line
• Atmel ATF1504 Fitter from Prochip Designer (newer): see Atmel Fitters. The WinCUPL-bundled fitter does not produce a working FireCPU.
• prjbureau fuseconv to regenerate the SVF from the JED (or use ATMISP)

Personally I sometimes experienced issues where ATMISP (v7.3) created 0 bytes long SVF file, or crashed randomly, so I had more luck with prjbureau's fuseconv.

Getting Started

The fastest path uses the files already in this repository — no synthesis required.

Program a board (recommended)

1. Order and assemble a board from hardware/, and fit a real 6502 (6502A recommended for 2 MHz).
2. Erase the ATF1504AS, then flash it:
   • OpenOCD: write erase.svf, then program.svf
   • ATMISP: flash cpu7501.jed
3. Install it in the machine — see Installation for the correct header-pin length.

Rebuild the CPLD from source (optional)

Only needed if you change cpu7501.pld. Edit the tool paths in build.bat and run it on Windows, or run the steps manually:

\path\to\cupl -jalxfb -m4 cpu7501.pld
\path\to\fit1504 -i CPU7501.tt2 -o cpu7501.jed -device TQFP100 -tech ATF1504AS

Then regenerate program.svf from the new cpu7501.jed with prjbureau fuseconv (or ATMISP), and flash as above.

Installation

FireCPU 7501 plugs into the original 7501/8501 CPU socket. The header pin length must match the machine, because the Plus/4 and the C16 have very different mechanical clearance:

• Plus/4 — use short header pins (flat pins, soldered flush). The board must stay low enough that the top case with the keyboard still closes over it.
• C16 — use longer pins (machine-pin header with a plastic spacer) so the board sits higher, rising above the neighbouring TED chip.

Using the wrong header height will either stop the case from closing (Plus/4) or leave the board fouling the TED (C16).

Short pins — Plus/4	Long pins — C16

License

FireCPU 7501 is licensed under the Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International license (CC BY-NC-SA 4.0). See LICENSE for the full text and NOTICE for the plain-language summary and reservations.

In short:

• ✅ Build FireCPU 7501 for yourself and your friends. Recovering your actual costs (components, PCB fabrication, programming, postage) with no profit is fine.
• ✅ Modify and share the design, with attribution, under this same license (ShareAlike).
• ❌ No selling for profit or other primarily commercial use.
• 🏷️ Commercial manufacture and sale are reserved to Jari Tulilahti / Firebay Refurb. Contact the author for commercial licensing.
• 🏷️ "FireCPU" and "Firebay Refurb" are trademarks and are not covered by the CC license — don't sell or brand hardware under those names without permission.

This is source-available, non-commercial open hardware. It is not OSHWA-certified Open Source Hardware (that definition requires permitting commercial use), and the OSHW mark is not used.