A4091 Zorro III SCSI controller: 53C710 model, SCRIPTS phase engine, drives scan and mount#123
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@reinauer , wanna review? |
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Oh wow! That kills one todo list item that has been in the back of my head. I won’t be able to review this one until I’m at a computer in a couple of days. |
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Pull request overview
Adds initial emulation support for the Commodore A4091 Zorro III SCSI-2 controller (board identity + nibble-wide ROM + NCR 53C710 register model and a minimal SCRIPTS subset) and introduces a new bidirectional TCP-backed serial sink for remote console workflows.
Changes:
- Add new
A4091Zorro III device board, config surface ([a4091]), and machine wiring to place it on the Zorro chain. - Implement an initial 53C710 register window model (mirroring, reset values, FIFOs, interrupt plumbing) plus a minimal SCRIPTS engine sufficient for ROM self-tests.
- Add
SerialMode::Tcpand aTcpSerialSinkimplementation (plus launcher UI integration when built withmidifeature).
Reviewed changes
Copilot reviewed 10 out of 10 changed files in this pull request and generated 2 comments.
Show a summary per file
| File | Description |
|---|---|
| src/zorro.rs | Adds BoardSpec::a4091() identity/config for the new Zorro III device board. |
| src/zorro_device.rs | Adds DeviceHost::for_slot() + self-window lookup, and wires BoardDevice::A4091. |
| src/video/launcher.rs | Extends launcher serial mode cycling to include TCP (in midi builds). |
| src/serial.rs | Implements TcpSerialSink and adds a unit test for basic round-trip behavior. |
| src/lib.rs | Exposes the new a4091 module. |
| src/emulator.rs | Wires SerialMode::Tcp and adds A4091 board creation/config validation at runtime. |
| src/cpu.rs | Constructs DeviceHost with slot awareness for Zorro device accesses. |
| src/config.rs | Adds [a4091] config parsing and introduces SerialMode::Tcp + [serial] listen. |
| src/bus.rs | Passes slot-aware DeviceHost into per-device ticking. |
| src/a4091.rs | New A4091 implementation: ROM nibble serving, 53C710 register/FIFO/IRQ behavior, minimal SCRIPTS engine, and unit tests. |
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| for &b in &buf[..n] { | ||
| if tx.send(b).is_err() { | ||
| return; | ||
| } | ||
| reader_buffered.fetch_add(1, std::sync::atomic::Ordering::Release); | ||
| } |
| log::warn!( | ||
| "a4091: the 53C710 SCSI core is not implemented yet; \ | ||
| [a4091] drive images are ignored" | ||
| ); |
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This patch series can scan my 2 HDF images, boot the partitions and boot my system. Still missing: config UI. Do we want it? |
The board autoconfigs (Commodore product 84, 16M Z3, DiagArea at $0200), serves the boot ROM nibble-wide, and models the 53C710 register file with the +$40 write shadows, mirrored across the register window. Passes the driver's walking-bits hardware test; the SCRIPTS processor is still a stub. Configured via a new [a4091] section (rom + unit0..6, drives ignored for now). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Increment DNAD / decrement DBC by the bus width and self-clear, as validated by the ncr7xx tool's register test. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
FMT nibble = $F (all DMA FIFO byte lanes empty), per the ncr7xx DMA FIFO test. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Four 16-deep byte lanes with parity behind CTEST6/CTEST4.FBL2; CTEST1 and DSTAT.DFE computed from fill state; parity via CTEST7.3 in, CTEST2.3 out. ISTAT.RST restores reset state, as a4091_reset() in the driver does. Passes the ncr7xx DMA FIFO test sequence. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
8-deep FIFO behind SODL/CTEST4.SFWR pushes and CTEST3 pops; odd parity generated, even under SCNTL1.AESP; count in SSTAT2, parity out via CTEST2.SFP. Passes the ncr7xx SCSI FIFO test. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
ISTAT.ABRT latches DSTAT.ABRT; DIP/SIP computed from pending causes; DSTAT/SSTAT0 clear on read; INT2 asserted for DIEN/SIEN-enabled causes, QEMU lsi53c710 semantics. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
DSP writes start execution: instructions fetched by DMA from host memory (incl. Z3 space), MOVE-immediate-to-register with native register numbering, RETURN via TEMP, INT loads DSPS and raises DSTAT.SIR; undecodable fetches stop with DSTAT.IID. Enough for the ncr7xx bus access test's address-pin probes. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
DeviceHost learns which slot it serves so a bus master can recognize DMA addresses inside its own configured window; the A4091 self-test Memory Moves the chip's own SCRATCH to TEMP through board space. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Model the low-level pin-test path: in loopback (CTEST4.SLBE) with the data bus asserted (SCNTL1.ADB), SODL mirrors onto SBDL and SOCL onto SBCL, with ACK/REQ gated on target mode (SCNTL0.TRG). SSTAT1.PAR reports the generated data parity and SSTAT1.RST reflects a SCNTL1.RST bus-reset request. Completes ncr7xx's SCSI pin test -- the suite is now 9/9. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Extend the SCRIPTS processor from the self-test subset to the driver's full I/O script (the NetBSD siop 53c710 script): SELECT with table- indirect target lookup, table-indirect block moves through the SCSI phases, conditional JUMP/CALL/RETURN/INT (phase and SFBR data compares, relative addressing), the SET/CLEAR handshake ops, and WAIT DISCONNECT. A per-nexus target state machine sequences MSG_OUT (IDENTIFY) -> COMMAND -> DATA_IN/OUT -> STATUS -> MSG_IN (command complete) -> disconnect, bridging each command to scsi.rs's ScsiDisk. Sync-transfer negotiation is declined with MESSAGE REJECT (async only); an empty SCSI ID raises a selection timeout (SSTAT0.STO) so the driver's bus probe moves on. Attach [a4091] unit images as bus targets. a4091.device now scans and mounts drives: devtest probe/geometry/benchmark and all read/seek packet types (CMD_READ, ETD_READ, TD_READ64, NSD) pass; filesystems are readable at ~550 MB/s. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
At some point, even if it isn't this PR. |
LinuxJedi
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A great addition, many thanks!
Adds the Commodore A4091 as a Zorro III SCSI-2 controller, staged bring-up guided by the open-source A4091 boot ROM and its ncr7xx hardware validation tool (https://github.com/A4091/a4091-software). a4091.device now scans the bus and mounts drives.
What's done
[a4091]config section:rom+unit0..6): Z3 autoconfig identity (mfg 514 / product 84 / 16M window / DiagArea vector $0200), nibble-wide autoboot ROM serving with 32K-image mirroring, DIP-switch byte at $8C0003, debugger peeks for the ROM region. First Z3 device board on the Zorro chain -- the existing routing handled it with no changes.ds_Deviceentry), table-indirect block moves through the SCSI phases, conditional JUMP/CALL/RETURN/INT (SCSI-phase and SFBR data compares, relative addressing), the SET/CLEAR handshake ops, WAIT DISCONNECT, plus the self-test's MOVE-immediate-to-register and Memory Move (including moves targeting the board's own register window, viaDeviceHost::for_slot).COPPERLINE_DIAG_A4091=1logs fetches, moves and the live phase.scsi.rsScsiDisk. Sync-transfer negotiation is declined with MESSAGE REJECT (async only); an empty SCSI ID raises a selection timeout (SSTAT0.STO) so the driver's bus probe moves on.[a4091] unit0..6images are attached as bus targets.How it was tested
-pbus probe (both targets),-ggeometry,-bbenchmark (~550 MB/s reads),-oopen/close, and-tpacket types -- CMD_READ, ETD_READ, TD_READ64 and the NSD 64-bit reads/seeks all pass.Notes / still to come
READ CAPACITY (16)is not modelled byScsiDisk(returns a sense error; the driver falls back to the 10-byte form, which works).Not caused by this branch, but found with it: ncr7xx's DMA test fails when MuForce+MuGuardianAngel trap the buffer writes (the AllocMem/FreeMem/AllocAbs alignment trick makes MuGA treat the buffer as free memory) -- the first trapped write loses its data somewhere in the 68040 access-error writeback path. Real hardware survives the same sequence. Will be reproduced and fixed separately.
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