rtl8733b: add RTL8731BU/RTL8733BU USB RX and TX by snokvist · Pull Request #388 · OpenIPC/devourer

snokvist · 2026-08-10T17:11:15Z

Summary

Adds a dedicated userspace HALMAC 87xx backend for the RTL8731BU/RTL8733BU Wi-Fi function.

Recognizes vendor USB IDs 0bda:f72b and 0bda:b733, while requiring live RTL8733B chip ID 0x16.
Implements card power sequencing, cut-selected firmware boot, HALMAC/MAC and EFUSE setup, generated BB/RF/RFK tables, dual-band channel setup, monitor RX, raw TX, thermal telemetry and safe teardown.
Advertises the hardware-tested surface only: 1x1 legacy OFDM + HT MCS0-7, BCC, 20/40 MHz, 2.4/5 GHz; long-preamble CCK is accepted only on 2.4 GHz at 20 MHz.
Adds reproducible, hash-pinned firmware/table extraction, parser/descriptor/EFUSE/table self-tests, a bounded lifecycle harness, rtl8733bprobe, adapter-doctor integration and capability documentation.
Integrates RTL8733B with the cross-generation rx.parse_abort telemetry added in rx.parse_abort: count the abandoned-aggregate RX loss on every generation #387.

This progresses the USB-first portion of #233. It does not auto-close that issue because narrowband RF validation and combo-module/coexistence work remain outside this PR.

Why a separate backend

RTL8733B is HALMAC 87xx, not a Jaguar2/3 variant. Its power, firmware, MAC, RX/TX descriptor and PHY paths therefore remain isolated under src/rtl8733b/.

Both reviewed vendor trees describe this device as 1SS 802.11b/g/n with a 20/40 MHz capability mask. The 2024 tree also contains a later Fix VHT flags commit that removes the accidentally enabled VHT flag. This PR consequently does not adopt #233's provisional VHT/80 MHz/2T2R assumptions.

Firmware and tables are pinned to libc0607/rtl8733bu-20230626 commit 9e5f6845b4e3393207720fc1886668bc80b6af1c. The implementation was compared with libc0607/rtl8733bu-20240806 commit 2ec19e154cffbc2abd98d43d59278dffa6e50d49, including its active-path TSSI, SRRC band-edge, GPIO/coexistence, power-saving and C2H/TX-tasklet changes. The already hardware-validated artifacts were not silently replaced.

Hardware tested

Test device: one 0bda:f72b, RTL8733B cut D, USB high speed. Independent witness: RTL8812AU in monitor mode.

Verified through the normal WiFiDriver / IRtlDevice path:

USB discovery/endpoints, repeated power/firmware/MAC/BB/RF bring-up, stable EFUSE reads and permanent MAC extraction.
Ambient monitor RX on channels 6 and 36, descriptor aggregation, PHY status, CRC reporting and clean stop.
A 60-second high-traffic RX run exposed a 20 KiB device-aggregate versus 16 KiB host-URB split. Capping RX aggregation at 12 KiB fixed it; five repeated high-traffic channel-36 runs then had zero malformed descriptors, aggregate mismatches or parser aborts.
Raw TX independently captured on both bands: legacy OFDM and HT MCS0-7 at 20 MHz, plus HT 40 MHz. BCC was forced throughout.
Long-preamble CCK independently captured at 1, 2, 5.5 and 11 Mbps on channel 6. A mixed CCK/OFDM run submitted 650/650 frames; 636 were captured with valid FCS across all requested rates. A 1 Mbps request on channel 36 was rejected before USB TX.
A rapid transition run submitted 1,000/1,000 frames through 118 CCK/OFDM TSSI table changes with zero USB failures. The witness captured 660 canonical frames across both rates, all with valid FCS; the thermal code stayed at 32-33 against EFUSE baseline 32.
Ten bounded warm lifecycle cycles rotating channels 6/36 passed EFUSE, firmware, initialization, RX parsing, thermal, rollback, card-disable and USB-persistence gates.
Concurrent RX/TX, bounded sustained TX, malformed-input rejection, teardown during active work, SIGINT during initialization and explicit failure cleanup passed.
Correctly targeted post-stress adapter doctor: HEALTHY; 4/4 identical EFUSE reads, firmware ready, 91 clean + 34 corrupt ambient frames, 125 frames total with zero malformed/aggregate errors.
Final explicit card-disable readback: RF_CTRL=0x00, CR=0xea.

Checks

Full default build: passed.
Full CTest matrix: 53/53 passed.
RTL8733B-only build (all other chip options disabled): passed.
RTL8733B-only CTest matrix: 49/49 passed.
RTL8733B-only ASan/UBSan build and CTest matrix: 49/49 passed.
bash -n, ShellCheck and failure-cleanup exercise for tests/rtl8733b_lifecycle_soak.sh: passed.
Firmware extractor --check: reproduced both checked-in NIC images byte-for-byte.
Table extractor --check: reproduced all checked-in MAC/BB/AGC/RF/RFK arrays byte-for-byte.
Based on current OpenIPC/devourer:master (da06ccc) for the final local builds and hardware checks.

Explicitly not tested or claimed

No SDR equipment was available. Occupied bandwidth, spectral mask, EVM, absolute output power and SDR duty measurements were not performed.
Experimental 5/10 MHz has register-readback and normal-path RX evidence only. Narrowband TX and independent narrowband-peer decode are deferred; narrowband_ok remains false.
No physical 0bda:b733 combo module was available. Its ID is from the vendor table; Bluetooth/coexistence is not implemented or claimed.
SGI remains disabled: descriptors with the short-GI bit set submitted, but the RTL8812AU witness decoded both broadcast and unicast probes as long GI.
STBC and LDPC are rejected. The vendor reports TX-LDPC but not RX-LDPC; this raw-injection path has only been validated with global BCC forced, and the known injection defect makes enabling LDPC here unjustified.
CCK short preamble, CCK outside 2.4 GHz/20 MHz, VHT, 80 MHz, ACK/BlockAck, A-MPDU, fast retune and throughput are not claimed.
The hub cannot switch VBUS, so automated repeated true-cold boots were not possible; physical replug and warm reinitialization were tested.
A vendor-kernel-driver cross-test was attempted with the 2024 tree on Linux 6.14. Its build first omitted required include paths, then failed on incompatible MODULE_IMPORT_NS syntax and missing platform_ops.h. No vendor module was loaded, so no vendor-driver parity result is claimed.
An RTL8731BU-labelled f72b passed early identity/EFUSE/firmware checks, but later stopped enumerating and overheated while attached to a custom power supply. It is excluded from all radio-validation claims.

The full tested/deferred matrix and provenance are in docs/rtl8733b.md.

snokvist · 2026-08-10T17:15:29Z

/review

qodo-free-for-open-source-projects · 2026-08-10T17:26:31Z

Code Review by Qodo

🐞 Bugs (1) 📘 Rule violations (0) 📎 Requirement gaps (2) 🎨 UX issues (0) 🔗 Cross-repo conflicts (0) 📜 Skill insights (0)

1. CR upper byte not cleared 🐞 Bug ≡ Correctness

Description

Halmac8733bMac::configure_monitor_rx enables the MAC using a 16-bit CR write (0x06ff), but
Halmac8733bMac::stop() clears only the low byte via rtw_write8(kRegCr, 0). This leaves CR[15:8] at
0x06 (not symmetric with enable), so stop() does not fully undo the MAC enable it applied,
undermining safe teardown/re-init sequencing.

Code

src/rtl8733b/Halmac8733bMac.cpp[R787-789]
+  _device.rtw_write16(kRegTxPause, 0xffff);
+  _device.rtw_write8(kRegCr, 0);
+}

Evidence

The RTL8733B monitor RX path programs CR via a 16-bit write to 0x06ff (commented as “full
DMA/protocol/MAC TX+RX enable”) and validates it with a 16-bit readback, meaning bits outside the
low byte are intentionally set. The stop() implementation only clears the low byte, so the high byte
(0x06) is not cleared. Other chip teardown code (Jaguar3) clears CR with a 16-bit write to 0x0000
before power-off, reinforcing that CR should be cleared at the same width it was enabled with.

src/rtl8733b/Halmac8733bMac.cpp[757-789]
src/jaguar3/HalJaguar3.cpp[453-461]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
`Halmac8733bMac::configure_monitor_rx()` writes `kRegCr` as a 16-bit value (`0x06ff`) to fully enable DMA/protocol/MAC TX+RX, but `Halmac8733bMac::stop()` only clears the low byte with `rtw_write8(kRegCr, 0)`. This can leave the upper CR byte (`0x06`) set after stop.
## Issue Context
- The same file explicitly treats CR as a 16-bit value during monitor RX enable and validates it with `rtw_read16(kRegCr) == 0x06ff`.
- Other generations’ deinit paths clear CR with a 16-bit write before powering off.
## Fix Focus Areas
- src/rtl8733b/Halmac8733bMac.cpp[782-789]
### Suggested change
In `Halmac8733bMac::stop()`, replace the 8-bit CR clear with a 16-bit clear (and keep the existing RCR/TxPause shutdown):
- `rtw_write16(kRegCr, 0x0000)` instead of `rtw_write8(kRegCr, 0)`
If RTL8733B CR is wider than 16 bits on this MAC, consider also explicitly clearing any additional CR bytes that are set during init/monitor config, but at minimum stop() should clear the same width it uses to enable.

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2. Rtl8733b omits 5/10 MHz 📎 Requirement gap ≡ Correctness

Description

RTL8733B capability reporting currently excludes 5/10 MHz narrowband (and does not advertise
FastRetune), contrary to the narrowband/FastRetune requirement. This prevents the expected
narrowband long-range mode from being enabled/verified through the normal capability surfaces.

Code

src/AdapterCaps.h[R83-86]

+  return g == ChipGeneration::Rtl8733b ? (kBw20 | kBw40)
+         : g == ChipGeneration::Jaguar1  ? ac
    : g == ChipGeneration::Unknown ? 0
                                   : (ac | kBw5 | kBw10);

Evidence
PR Compliance ID 7 expects RTL8733B narrowband 5/10 MHz support (and FastRetune). The PR sets
RTL8733B bandwidth mask to only 20/40 MHz, and GetTxCaps() explicitly documents that 5/10 MHz is
omitted; no RTL8733B caps path marks FastRetune as supported.
Implement narrowband 5/10 MHz support and FastRetune (M4 gate)
src/AdapterCaps.h[77-86]
src/rtl8733b/Rtl8733bDevice.cpp[529-536]
src/AdapterCaps.h[213-218]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
PR Compliance ID 7 requires RTL8733B narrowband 5/10 MHz support plus FastRetune behavior. Current RTL8733B capability reporting excludes 5/10 MHz and does not surface FastRetune support, so narrowband cannot be enabled/validated via the standard capability path.
## Issue Context
- `bw_mask_for_generation(ChipGeneration::Rtl8733b)` currently returns only 20/40.
- `Rtl8733bDevice::GetTxCaps()` explicitly states 5/10 MHz is omitted.
- `AdapterCaps::fastretune_ok` remains at its default (`false`) for RTL8733B.
## Fix Focus Areas
- src/AdapterCaps.h[77-86]
- src/rtl8733b/Rtl8733bDevice.cpp[529-559]
- src/AdapterCaps.h[213-218]

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3. GetAdapterCaps leaves narrowband_ok false 📎 Requirement gap ≡ Correctness

Description

RTL8733B GetAdapterCaps() does not set narrowband_ok (or fastretune_ok) and hard-codes chain
counts rather than runtime-detecting them, which violates the RTL8733B adapter capability reporting
requirement. This causes demos/telemetry to misrepresent RTL8733B feature availability.

Code

src/rtl8733b/Rtl8733bDevice.cpp[R548-551]

+  caps.tx_chains = 1;
+  caps.rx_chains = 1;
+  caps.tx = GetTxCaps();
+  caps.bw_mask = devourer::bw_mask_for_generation(caps.generation);

Evidence

PR Compliance ID 8 requires RTL8733B capability reporting (including narrowband capability and
correct feature flags). In the added RTL8733B backend, GetAdapterCaps() never assigns
narrowband_ok/fastretune_ok (so they remain false per the struct defaults) and sets chain
counts as fixed constants rather than runtime-derived.

Adapter capabilities reporting for RTL8733B (identity and feature flags)
src/rtl8733b/Rtl8733bDevice.cpp[539-559]
src/AdapterCaps.h[213-218]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
PR Compliance ID 8 requires RTL8733B `AdapterCaps` to correctly surface identity and feature flags, including narrowband capability, and to avoid misreporting RF chain capabilities.
## Issue Context
- `AdapterCaps::narrowband_ok` and `AdapterCaps::fastretune_ok` default to `false`.
- `Rtl8733bDevice::GetAdapterCaps()` populates identity/bands/`bw_mask`, but does not set `narrowband_ok`/`fastretune_ok` and hard-codes `tx_chains`/`rx_chains`.
## Fix Focus Areas
- src/rtl8733b/Rtl8733bDevice.cpp[539-559]
- src/AdapterCaps.h[118-120]
- src/AdapterCaps.h[213-218]

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4. ~~UB shift in txdesc~~ ✓ Resolved 🐞 Bug ≡ Correctness

Description

rtl8733b::txdesc_set_bits uses (1u << width) which is undefined behavior for width==32, so encoding
a 32-bit field would produce unpredictable masks and corrupt the TX descriptor. Because this helper
is header-only and reusable, a future call site can trigger this silently.

Code

src/rtl8733b/TxDescriptor8733b.h[R47-50]

+inline void txdesc_set_bits(uint8_t *p, unsigned bit, unsigned width,
+                            uint32_t value) {
+  const uint32_t field = ((1u << width) - 1u) << bit;
+  txdesc_write_le32(p, (txdesc_le32(p) & ~field) |

Evidence

The TX helper computes its mask via 1u << width without guarding width == 32, which is UB. The
nearby RTL8733B RX helper (rx_bits) explicitly special-cases width == 32, demonstrating the
expected safe handling pattern in this repo.

src/rtl8733b/TxDescriptor8733b.h[47-52]
src/rtl8733b/FrameParser8733b.h[21-25]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
`txdesc_set_bits()` builds its bitmask with `1u << width`; when `width == 32` this is undefined behavior in C/C++ and can generate an incorrect mask/descriptor.
### Issue Context
The RTL8733B TX descriptor encoder is intended to be a generic bitfield writer; the RX-side helper already special-cases `width == 32`, suggesting 32-bit fields are a known boundary in this codebase.
### Fix Focus Areas
- src/rtl8733b/TxDescriptor8733b.h[47-52]
### Suggested fix
- Special-case `width == 32` (and validate `bit == 0`) or compute the mask using a 64-bit intermediate (`1ull << width`) and validate `bit + width <= 32` before shifting.
- Consider explicitly handling `width == 0` as a no-op to avoid accidental full-clear patterns.

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5. ~~RX malformed counter misleading~~ ✓ Resolved 🐞 Bug ◔ Observability

Description

Rtl8733bDevice increments malformed on any RX parse failure even when the remainder is all-zero
padding (which emit_rx_parse_abort explicitly treats as benign). This inflates/poisons the RX
summary counters and makes troubleshooting RX parser regressions harder.

Code

src/rtl8733b/Rtl8733bDevice.cpp[R181-184]

+                                    frame)) {
+        ++malformed;
+        devourer::emit_rx_parse_abort(
+            _logger->events(), data + offset,

Evidence

The RX loop counts every parse failure as malformed. However, emit_rx_parse_abort explicitly
excludes all-zero remainder padding, and parse_rx_8733b returns false when frame_len==0—the
decode result you’d get from a zero-filled padded descriptor region—so benign padding can be counted
as malformed.

src/rtl8733b/Rtl8733bDevice.cpp[170-188]
src/RxParseAbort.h[4-10]
src/RxParseAbort.h[19-37]
src/rtl8733b/FrameParser8733b.h[96-103]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
The RX loop increments the `malformed` counter before determining whether the parse failure is a real abort or just benign all-zero aggregate padding.
### Issue Context
`emit_rx_parse_abort()` is explicitly designed to suppress events for all-zero remainder padding. Separately, `parse_rx_8733b()` returns `false` when `frame_len == 0`, which is exactly what an all-zero padded “descriptor” would decode as.
### Fix Focus Areas
- src/rtl8733b/Rtl8733bDevice.cpp[170-189]
- src/rtl8733b/FrameParser8733b.h[96-103]
- src/RxParseAbort.h[19-37]
### Suggested fix
- Before incrementing `malformed`, detect the benign-padding case (all-zero remainder) and break without counting it as malformed.
- Alternatively, restructure as:
- detect `all_zero` remainder locally (even when event sink is disabled),
- only then increment `malformed` + emit `rx.parse_abort` for non-zero remainder.

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qodo-free-for-open-source-projects · 2026-08-11T15:48:08Z

PR Summary by Qodo

rtl8733b: add USB monitor RX and raw TX support

✨ Enhancement 🧪 Tests 📝 Documentation ⚙️ Configuration changes 🕐 40+ Minutes

AI Description

• Adds a dedicated HALMAC 87xx backend for RTL8731BU and RTL8733BU USB Wi-Fi.
• Enables validated monitor RX and bounded raw CCK, OFDM, and HT transmission.
• Pins vendor firmware and PHY tables with extraction tools, tests, diagnostics, and documentation.

Diagram

graph TD
  A["WiFiDriver"] --> B["Rtl8733bDevice"] --> C["Bringup and MAC"] --> D["PHY and RF"] --> E["Firmware and Tables"]
  B --> F["RX and TX"] --> G["IRtlDevice Clients"]
  H["Probe and Tests"] --> B

High-Level Assessment

The following are alternative approaches to this PR:

1. Extend a Jaguar backend

➕ Could reuse some existing device plumbing and reduce file count.
➖ RTL8733B has incompatible HALMAC power, firmware, descriptor, and PHY paths; shared code risks unsupported capability leakage.

2. Accept PID-only dispatch

➕ Could create the device when a live chip-ID read is transiently unavailable.
➖ Would weaken identity validation and may misroute a device into an incompatible backend.

Recommendation: Keep the isolated HALMAC 87xx backend and require live chip ID 0x16. This matches the hardware architecture, preserves conservative capability gating, and explicitly prevents unsafe Jaguar fallback; common interfaces are reused only at the correct abstraction boundary.

Files changed (38) +38857 / -81

Enhancement (17) +5044 / -34

main.cppInclude RTL8733B USB IDs in adapter doctor +2/-1

Include RTL8733B USB IDs in adapter doctor
• Adds RTL8731BU/RTL8733BU product IDs to the doctor discovery PID set.
examples/doctor/main.cpp

main.cppAdd staged RTL8733B diagnostic probe +406/-0

Add staged RTL8733B diagnostic probe

• Introduces a command-line probe for identity, power, EFUSE, firmware, MAC, PHY, channel, and TSSI stages. Uses guarded teardown to leave diagnostic hardware safely powered down.

examples/rtl8733bprobe/main.cpp

main.cppGeneralize RX thermal telemetry and cleanup +80/-23

Generalize RX thermal telemetry and cleanup

• Moves thermal polling to the common IRtlDevice interface and includes CRC, ICV, and RSSI event fields. Ensures background emitters stop before USB teardown.

examples/rx/main.cpp

main.cppBound TX runs and use time-based thermal polling +26/-9

Bound TX runs and use time-based thermal polling

• Adds an optional finite TX frame limit for reproducible captures. Changes thermal polling to wall-clock scheduling so it remains accurate with custom frame pacing.

examples/tx/main.cpp

AdapterCaps.hAdd RTL8733B capability generation +5/-1

Add RTL8733B capability generation
• Adds the RTL8733B chip generation name and constrains its advertised bandwidth mask to 20/40 MHz.
src/AdapterCaps.h

WiFiDriver.cppDispatch validated RTL8733B devices +27/-0

Dispatch validated RTL8733B devices

• Creates Rtl8733bDevice for live chip ID 0x16 and known RTL8733B USB identities. Refuses the historical Jaguar fallback when a known RTL8733B PID reports an unexpected chip ID.

src/WiFiDriver.cpp

FrameParser8733b.hImplement RTL8733B RX descriptor parsing +161/-0

Implement RTL8733B RX descriptor parsing
• Adds bounds-checked parsing for HALMAC 87xx RX aggregates, C2H packets, PHY status, alignment, and signal metadata.
src/rtl8733b/FrameParser8733b.h

Halmac8733bMac.cppImplement RTL8733B EFUSE and MAC setup +791/-0

Implement RTL8733B EFUSE and MAC setup

• Implements physical EFUSE decoding, normal USB queue and WMAC setup, monitor RX configuration, and safe 12 KiB RX aggregation. Validates expected MAC state and disables unsafe LDPC configuration.

src/rtl8733b/Halmac8733bMac.cpp

Halmac8733bMac.hDefine RTL8733B MAC and EFUSE interfaces +141/-0

Define RTL8733B MAC and EFUSE interfaces
• Defines EFUSE, TX-power, MAC-state, and HALMAC initialization contracts used by the device backend.
src/rtl8733b/Halmac8733bMac.h

Phy8733b.cppImplement RTL8733B PHY, channel, and TSSI control +1606/-0

Implement RTL8733B PHY, channel, and TSSI control
• Loads conditional vendor tables, configures dual-band channels and widths, and applies safe flat or capped TSSI power control with rollback checks.
src/rtl8733b/Phy8733b.cpp

Phy8733b.hDefine RTL8733B PHY planning interfaces +255/-0

Define RTL8733B PHY planning interfaces
• Declares PHY initialization, channel planning, table selection, thermal telemetry, TX gain, and TSSI state validation APIs.
src/rtl8733b/Phy8733b.h

Rtl8733bBringup.cppImplement RTL8733B power and firmware boot +558/-0

Implement RTL8733B power and firmware boot
• Implements identity reads, card enable/disable sequencing, cut-selected firmware download, checksum verification, and ready handshakes.
src/rtl8733b/Rtl8733bBringup.cpp

Rtl8733bBringup.hDefine RTL8733B bring-up contract +83/-0

Define RTL8733B bring-up contract
• Declares chip snapshots and focused card power, firmware, and register-access operations.
src/rtl8733b/Rtl8733bBringup.h

Rtl8733bDevice.cppImplement RTL8733B monitor RX and raw TX +647/-0

Implement RTL8733B monitor RX and raw TX
• Adds production lifecycle orchestration, monitor RX parsing, constrained radiotap TX, thermal gating, TSSI transitions, capabilities, and safe teardown.
src/rtl8733b/Rtl8733bDevice.cpp

Rtl8733bDevice.hDefine dedicated RTL8733B IRtlDevice backend +81/-0

Define dedicated RTL8733B IRtlDevice backend
• Declares the isolated device implementation and its bring-up, MAC, PHY, RX/TX, telemetry, and teardown state.
src/rtl8733b/Rtl8733bDevice.h

Rtl8733bUsbIds.hDefine RTL8733B USB identity gates +34/-0

Define RTL8733B USB identity gates
• Adds vendor USB IDs and authoritative live chip-ID predicates for RTL8731BU/RTL8733BU dispatch.
src/rtl8733b/Rtl8733bUsbIds.h

TxDescriptor8733b.hImplement validated RTL8733B TX descriptors +141/-0

Implement validated RTL8733B TX descriptors
• Encodes 40-byte HALMAC TX descriptors with rate mapping, checksum generation, USB padding, and strict rejection of unsupported modes.
src/rtl8733b/TxDescriptor8733b.h

Bug fix (1) +14 / -11

RxParseAbort.hSeparate RX padding classification from event emission +14/-11

Separate RX padding classification from event emission
• Adds a reusable zero-padding classifier and prevents benign padding from being treated as parse aborts regardless of event-sink state.
src/RxParseAbort.h

Tests (7) +977 / -5

adapter_caps_selftest.cppTest RTL8733B capability and identity gates +14/-0

Test RTL8733B capability and identity gates
• Verifies RTL8733B generation naming, 20/40 MHz limits, chip ID, and supported USB IDs.
tests/adapter_caps_selftest.cpp

parse_abort_smoke.shExercise RTL8733B parse-abort telemetry +5/-5

Exercise RTL8733B parse-abort telemetry
• Adds the tested RTL8733B PID to the cross-generation RX parse-abort smoke suite.
tests/parse_abort_smoke.sh

rtl8733b_efuse_selftest.cppTest RTL8733B EFUSE and MAC invariants +172/-0

Test RTL8733B EFUSE and MAC invariants
• Covers EFUSE map decoding, direct and TSSI power data, fallback behavior, and bounded RX aggregation MAC-state validation.
tests/rtl8733b_efuse_selftest.cpp

rtl8733b_lifecycle_soak.shAdd bounded RTL8733B warm lifecycle soak +180/-0

Add bounded RTL8733B warm lifecycle soak
• Runs repeated doctor/probe cycles with USB persistence, firmware, EFUSE, RX parser, thermal, TSSI rollback, and card-disable gates.
tests/rtl8733b_lifecycle_soak.sh

rtl8733b_phy_table_selftest.cppTest RTL8733B tables, channels, and TSSI plans +295/-0

Test RTL8733B tables, channels, and TSSI plans
• Validates generated table sizes and selection, power targets, channel plans, narrowband readback predicates, and PHY/TSSI state checks.
tests/rtl8733b_phy_table_selftest.cpp

rtl8733b_rx_parse_selftest.cppTest RTL8733B RX descriptor parsing +168/-0

Test RTL8733B RX descriptor parsing
• Covers normal and C2H descriptors, aggregate walking, malformed inputs, padding handling, and CCK/OFDM/HT PHY status parsing.
tests/rtl8733b_rx_parse_selftest.cpp

rtl8733b_tx_desc_selftest.cppTest RTL8733B TX descriptor encoding +143/-0

Test RTL8733B TX descriptor encoding
• Verifies descriptor golden bytes, checksums, CCK/OFDM/HT rate mapping, and unsupported-mode rejection.
tests/rtl8733b_tx_desc_selftest.cpp

Documentation (5) +173 / -19

README.mdDocument RTL8733B support surface +23/-12

Document RTL8733B support surface

• Updates supported generations and hardware tables for RTL8731BU/RTL8733BU. Documents conservative 1x1 HT/20–40 MHz capability limits and the diagnostic probe.

README.md

narrowband.mdClarify experimental RTL8733B narrowband status +8/-3

Clarify experimental RTL8733B narrowband status
• Documents the 5/10 MHz register workaround and explicitly keeps it unadvertised pending RF validation.
docs/narrowband.md

rtl8733b.mdAdd RTL8733B validation and provenance record +136/-0

Add RTL8733B validation and provenance record

• Documents supported identities, validated RX/TX capabilities, safety limits, deferred work, hardware results, and pinned vendor-source provenance.

docs/rtl8733b.md

IRtlDevice.hRegister RTL8733B as an IRtlDevice implementation +3/-1

Register RTL8733B as an IRtlDevice implementation
• Documents the new dedicated HALMAC 87xx backend in the common device contract.
src/IRtlDevice.h

WiFiDriver.hUpdate factory backend documentation +3/-3

Update factory backend documentation
• Describes that the factory can return the dedicated RTL8733B backend through IRtlDevice.
src/WiFiDriver.h

Other (8) +32649 / -12

cmake-multi-platform.ymlAdd RTL8733B build-selection coverage +14/-11

Add RTL8733B build-selection coverage
• Adds an RTL8733B-only matrix job and explicitly disables RTL8733B in other chip-only jobs. Updates the no-chip configure failure gate.
.github/workflows/cmake-multi-platform.yml

CMakeLists.txtBuild and test the RTL8733B backend +55/-1

Build and test the RTL8733B backend

• Adds the DEVOURER_8733B option, backend sources, generated artifacts, probe executable, and RTL8733B self-tests. Allows RTL8733B as the sole enabled chip family.

CMakeLists.txt

hal8733b_fw.cVendor RTL8733B NIC firmware blobs +30566/-0

Vendor RTL8733B NIC firmware blobs
• Adds generated, hash-pinned normal and CCV NIC firmware images extracted from the selected vendor source.
hal/hal8733b_fw.c

hal8733b_fw.hExpose RTL8733B firmware blobs +15/-0

Expose RTL8733B firmware blobs
• Declares the generated normal and CCV firmware arrays and their lengths.
hal/hal8733b_fw.h

hal8733b_tables.cVendor RTL8733B PHY parameter tables +1642/-0

Vendor RTL8733B PHY parameter tables
• Adds generated, hash-pinned MAC, BB, AGC, RF, power-target, and RFK initialization tables.
hal/hal8733b_tables.c

hal8733b_tables.hExpose RTL8733B parameter tables +26/-0

Expose RTL8733B parameter tables
• Declares generated parameter arrays consumed by the RTL8733B PHY implementation.
hal/hal8733b_tables.h

extract_8733b_fw.pyAdd reproducible RTL8733B firmware extractor +144/-0

Add reproducible RTL8733B firmware extractor
• Extracts only required NIC firmware images while validating pinned source, blob sizes, hashes, and checked-in output reproducibility.
tools/extract_8733b_fw.py

extract_8733b_tables.pyAdd reproducible RTL8733B table extractor +187/-0

Add reproducible RTL8733B table extractor
• Extracts vendor MAC/BB/AGC/RF/RFK arrays with source and stream hash checks, then verifies or regenerates checked-in artifacts.
tools/extract_8733b_tables.py

qodo-free-for-open-source-projects · 2026-08-11T15:50:31Z

Code review by qodo was updated up to the latest commit 0bfd8c3

snokvist added 2 commits August 10, 2026 19:09

rtl8733b: add USB monitor RX and raw TX support

69753c3

ci: cover RTL8733B build selection

f9388fa

rtl8733b: avoid Windows min/max macros

dfb7fc2

qodo-free-for-open-source-projects Bot reviewed Aug 10, 2026

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Comment thread src/AdapterCaps.h

Comment thread src/rtl8733b/Rtl8733bDevice.cpp

Comment thread src/rtl8733b/TxDescriptor8733b.h

Comment thread src/rtl8733b/Rtl8733bDevice.cpp Outdated

snokvist added 4 commits August 10, 2026 19:31

rtl8733b: harden descriptor and RX padding handling

c94daba

ci: refresh review gate after thread resolution

e40ac68

rtl8733b: bound RX aggregation and add lifecycle soak

0675b42

rtl8733b: add validated long-preamble CCK TX

0bfd8c3

snokvist marked this pull request as ready for review August 11, 2026 15:43

qodo-free-for-open-source-projects Bot reviewed Aug 11, 2026

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Comment thread src/rtl8733b/Halmac8733bMac.cpp

rtl8733b: clear full CR on MAC stop

c374834

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rtl8733b: add RTL8731BU/RTL8733BU USB RX and TX - #388

rtl8733b: add RTL8731BU/RTL8733BU USB RX and TX#388
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Summary

Why a separate backend

Hardware tested

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Explicitly not tested or claimed

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Code Review by Qodo

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