[TRITON/GLUON]: Add moe_a16w4 gluon(gfx1250) kernel

[rahulbatra85]

Motivation

Adds moe_a16w4 gluon kernel

Technical Details

Add moe_a16w4 gluon kernel. First 4-bit weight is scaled and upcasted to bf16 and then a bf16 gemm is performed. The gluon kernel also uses gfx1250 tdm ops and pipelining

Test Plan

Unit tests

Test Result

All tests should pass

Submission Checklist

• Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

[github-actions]

🏷️ CI Guide

Runs automatically on every PR:

• ✅ Pre-checks (submodule verification, code formatting)
• ✅ Aiter op tests (gfx942 + gfx950)
• ✅ Triton tests on MI35X (only when aiter/ops/triton/** or related paths are changed)

Extended tests (opt-in via labels):

Label	Tests
ci:triton-300x	Run an additional Triton test job on MI300X in PRs; main branch always runs both MI35X and MI300X
ci:sglang	SGLang integration tests: DeepSeek-R1-MXFP4 accuracy, Qwen 3.5 accuracy
ci:atom	ATOM benchmark: DeepSeek-R1-0528, GPT-OSS-120B
ci:atom_full	ATOM accuracy suite for PR and main models from ATOM models_accuracy.json
ci:vllm	vLLM benchmark: GPT-OSS-120B, DeepSeek-R1-0528, Kimi-K2.5
ci:all	All standard extended tests (excludes ci:atom_full)

Only add ci:atom_full for FlyDSL or Triton upgrades.
Add labels via the sidebar or gh pr edit 3277 --add-label <label>

[lburzawa]

@rahulbatra85 check out some gluon gfx1250 optimizations I added to a8w4 kernel that should also help in your case.

• Simpler prologue with less loads/waits in case of not using xcd swizzle

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 177 in a40c487

  else:

• Using int16 gather indices where available

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 197 in a40c487

  if GatherIndx.dtype.element_ty == gl.uint16:

• Setting OOB index for gather indices that represent padding so we don't issues loads there

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 201 in a40c487

  oob_idx = (num_tokens).to(gl.uint16)

• Using TDM store

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 608 in a40c487

  gl.amd.gfx1250.tdm.async_store(

[rahulbatra85]

@rahulbatra85 check out some gluon gfx1250 optimizations I added to a8w4 kernel that should also help in your case.

• Simpler prologue with less loads/waits in case of not using xcd swizzle

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 177 in a40c487

  else:

• Using int16 gather indices where available

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 197 in a40c487

  if GatherIndx.dtype.element_ty == gl.uint16:

• Setting OOB index for gather indices that represent padding so we don't issues loads there

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 201 in a40c487

  oob_idx = (num_tokens).to(gl.uint16)

• Using TDM store

  aiter/aiter/ops/triton/_gluon_kernels/gfx1250/moe/moe_op_gemm_a8w4.py

  Line 608 in a40c487

  gl.amd.gfx1250.tdm.async_store(

Ok, will update my code.

[lburzawa]

One more thing is we can use tdm for bias too, just have to be careful with waits in epilogue if issuing load beforehand. You can also take a look at how it's done in a8w4 kernel.