Replace CHOOSE_IMPLEMENTATION/CHOOSE_SVE_IMPLEMENTATION macros with constexpr dispatch tables

src/VecSim/spaces/functions/AVX.cpp

@@ -7,6 +7,7 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 
 #include "VecSim/spaces/L2/L2_AVX_FP32.h"
 #include "VecSim/spaces/L2/L2_AVX_FP64.h"
@@ -16,32 +17,24 @@
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_FP32_IP_implementation_AVX(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP32_InnerProductSIMD16_AVX);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP32_InnerProductSIMD16_AVX<N>; });
 }
 
 dist_func_t<double> Choose_FP64_IP_implementation_AVX(size_t dim) {
-    dist_func_t<double> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 8, FP64_InnerProductSIMD8_AVX);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<double>, 8>(
+        dim, []<size_t N>() { return FP64_InnerProductSIMD8_AVX<N>; });
 }
 
 dist_func_t<float> Choose_FP32_L2_implementation_AVX(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP32_L2SqrSIMD16_AVX);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP32_L2SqrSIMD16_AVX<N>; });
 }
 
 dist_func_t<double> Choose_FP64_L2_implementation_AVX(size_t dim) {
-    dist_func_t<double> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 8, FP64_L2SqrSIMD8_AVX);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<double>, 8>(
+        dim, []<size_t N>() { return FP64_L2SqrSIMD8_AVX<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX2.cpp

@@ -7,6 +7,7 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX2.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 
 #include "VecSim/spaces/IP/IP_AVX2_BF16.h"
 #include "VecSim/spaces/L2/L2_AVX2_BF16.h"
@@ -15,38 +16,29 @@
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_BF16_IP_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, BF16_InnerProductSIMD32_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return BF16_InnerProductSIMD32_AVX2<N>; });
 }
 
 dist_func_t<float> Choose_BF16_L2_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, BF16_L2SqrSIMD32_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return BF16_L2SqrSIMD32_AVX2<N>; });
 }
 
 dist_func_t<float> Choose_SQ8_FP32_IP_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, SQ8_FP32_InnerProductSIMD16_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return SQ8_FP32_InnerProductSIMD16_AVX2<N>; });
 }
 
 dist_func_t<float> Choose_SQ8_FP32_Cosine_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, SQ8_FP32_CosineSIMD16_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return SQ8_FP32_CosineSIMD16_AVX2<N>; });
 }
 
 dist_func_t<float> Choose_SQ8_FP32_L2_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, SQ8_FP32_L2SqrSIMD16_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return SQ8_FP32_L2SqrSIMD16_AVX2<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX2_F16C.cpp

@@ -7,29 +7,23 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX2_F16C.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 #include "VecSim/spaces/IP/IP_AVX2_SQ8_FP16.h"
 #include "VecSim/spaces/L2/L2_AVX2_SQ8_FP16.h"
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_SQ8_FP16_IP_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_InnerProductSIMD16_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_InnerProductSIMD16_AVX2<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP16_Cosine_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_CosineSIMD16_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_CosineSIMD16_AVX2<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP16_L2_implementation_AVX2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_L2SqrSIMD16_AVX2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_L2SqrSIMD16_AVX2<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX2_FMA.cpp

@@ -7,30 +7,25 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX2_FMA.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 #include "VecSim/spaces/L2/L2_AVX2_FMA_SQ8_FP32.h"
 #include "VecSim/spaces/IP/IP_AVX2_FMA_SQ8_FP32.h"
 
 namespace spaces {
 
-#include "implementation_chooser.h"
 // FMA optimized implementations
 dist_func_t<float> Choose_SQ8_FP32_IP_implementation_AVX2_FMA(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, SQ8_FP32_InnerProductSIMD16_AVX2_FMA);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return SQ8_FP32_InnerProductSIMD16_AVX2_FMA<N>; });
 }
 
 dist_func_t<float> Choose_SQ8_FP32_Cosine_implementation_AVX2_FMA(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, SQ8_FP32_CosineSIMD16_AVX2_FMA);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return SQ8_FP32_CosineSIMD16_AVX2_FMA<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP32_L2_implementation_AVX2_FMA(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, SQ8_FP32_L2SqrSIMD16_AVX2_FMA);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return SQ8_FP32_L2SqrSIMD16_AVX2_FMA<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX2_FMA_F16C.cpp

@@ -7,29 +7,23 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX2_FMA_F16C.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 #include "VecSim/spaces/IP/IP_AVX2_FMA_SQ8_FP16.h"
 #include "VecSim/spaces/L2/L2_AVX2_FMA_SQ8_FP16.h"
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_SQ8_FP16_IP_implementation_AVX2_FMA(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_InnerProductSIMD16_AVX2_FMA);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_InnerProductSIMD16_AVX2_FMA<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP16_Cosine_implementation_AVX2_FMA(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_CosineSIMD16_AVX2_FMA);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_CosineSIMD16_AVX2_FMA<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP16_L2_implementation_AVX2_FMA(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_L2SqrSIMD16_AVX2_FMA);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_L2SqrSIMD16_AVX2_FMA<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX512BF16_VL.cpp

@@ -7,19 +7,15 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX512BF16_VL.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 
 #include "VecSim/spaces/IP/IP_AVX512_BF16_VL_BF16.h"
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_BF16_IP_implementation_AVX512BF16_VL(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, BF16_InnerProductSIMD32_AVX512BF16_VL);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return BF16_InnerProductSIMD32_AVX512BF16_VL<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX512BW_VBMI2.cpp

@@ -7,26 +7,21 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX512BW_VBMI2.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 
 #include "VecSim/spaces/IP/IP_AVX512BW_VBMI2_BF16.h"
 #include "VecSim/spaces/L2/L2_AVX512BW_VBMI2_BF16.h"
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_BF16_IP_implementation_AVX512BW_VBMI2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, BF16_InnerProductSIMD32_AVX512BW_VBMI2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return BF16_InnerProductSIMD32_AVX512BW_VBMI2<N>; });
 }
 
 dist_func_t<float> Choose_BF16_L2_implementation_AVX512BW_VBMI2(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, BF16_L2SqrSIMD32_AVX512BW_VBMI2);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return BF16_L2SqrSIMD32_AVX512BW_VBMI2<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX512F.cpp

@@ -7,6 +7,7 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX512F.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 
 #include "VecSim/spaces/L2/L2_AVX512F_FP16.h"
 #include "VecSim/spaces/L2/L2_AVX512F_FP32.h"
@@ -20,63 +21,50 @@
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_FP32_IP_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP32_InnerProductSIMD16_AVX512);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP32_InnerProductSIMD16_AVX512<N>; });
 }
 
 dist_func_t<double> Choose_FP64_IP_implementation_AVX512F(size_t dim) {
-    dist_func_t<double> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, FP64_InnerProductSIMD8_AVX512);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<double>, 16>(
+        dim, []<size_t N>() { return FP64_InnerProductSIMD8_AVX512<N>; });
 }
 
 dist_func_t<float> Choose_FP32_L2_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP32_L2SqrSIMD16_AVX512);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP32_L2SqrSIMD16_AVX512<N>; });
 }
 
 dist_func_t<double> Choose_FP64_L2_implementation_AVX512F(size_t dim) {
-    dist_func_t<double> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, FP64_L2SqrSIMD8_AVX512);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<double>, 16>(
+        dim, []<size_t N>() { return FP64_L2SqrSIMD8_AVX512<N>; });
 }
 
 dist_func_t<float> Choose_FP16_IP_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP16_InnerProductSIMD32_AVX512);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP16_InnerProductSIMD32_AVX512<N>; });
 }
 
 dist_func_t<float> Choose_FP16_L2_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP16_L2SqrSIMD32_AVX512);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP16_L2SqrSIMD32_AVX512<N>; });
 }
 
 // SQ8↔FP16 kernels only use AVX-512F (cvtph_ps + FMA), so they register here rather than under
 // the VNNI tier — CPUs with AVX-512F but no VNNI (Skylake-X, some Cascade Lake variants) can use
 // these kernels.
 dist_func_t<float> Choose_SQ8_FP16_IP_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_InnerProductSIMD16_AVX512F);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_InnerProductSIMD16_AVX512F<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP16_Cosine_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_CosineSIMD16_AVX512F);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_CosineSIMD16_AVX512F<N>; });
 }
 dist_func_t<float> Choose_SQ8_FP16_L2_implementation_AVX512F(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 16, SQ8_FP16_L2SqrSIMD16_AVX512F);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 16>(
+        dim, []<size_t N>() { return SQ8_FP16_L2SqrSIMD16_AVX512F<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces

src/VecSim/spaces/functions/AVX512FP16_VL.cpp

@@ -7,26 +7,21 @@
  * GNU Affero General Public License v3 (AGPLv3).
  */
 #include "AVX512FP16_VL.h"
+#include "VecSim/spaces/functions/residual_dispatch.h"
 
 #include "VecSim/spaces/IP/IP_AVX512FP16_VL_FP16.h"
 #include "VecSim/spaces/L2/L2_AVX512FP16_VL_FP16.h"
 
 namespace spaces {
 
-#include "implementation_chooser.h"
-
 dist_func_t<float> Choose_FP16_IP_implementation_AVX512FP16_VL(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP16_InnerProductSIMD32_AVX512FP16_VL);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP16_InnerProductSIMD32_AVX512FP16_VL<N>; });
 }
 
 dist_func_t<float> Choose_FP16_L2_implementation_AVX512FP16_VL(size_t dim) {
-    dist_func_t<float> ret_dist_func;
-    CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 32, FP16_L2SqrSIMD32_AVX512FP16_VL);
-    return ret_dist_func;
+    return dispatch_by_residual<dist_func_t<float>, 32>(
+        dim, []<size_t N>() { return FP16_L2SqrSIMD32_AVX512FP16_VL<N>; });
 }
 
-#include "implementation_chooser_cleanup.h"
-
 } // namespace spaces