Adding Versal interrupt support - #36
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pl_ps_irq0..15 at 116-131 on gen 1, pl_lpd_irq0..7 at 136-143 and pl_fpd_irq0..7 at 175-182 on gen 2. All three families share one table since the port names never collide, and irq_map skips ports the design does not carry. Assignments from AM011 and AM026. Also guard the interrupt controller walk against signals that leave the design through a module boundary, which raised AttributeError. The pins view already has this guard.
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