Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions examples/wch/ch32v/build.zig
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@ pub fn build(b: *std.Build) void {
.{ .target = mb.ports.ch32v.boards.ch32v203.nano_ch32v203, .name = "nano_ch32v203_usb_cdc", .file = "src/usb_cdc.zig" },
.{ .target = mb.ports.ch32v.boards.ch32v203.suzuduino_uno_v1b, .name = "suzuduino_blinky", .file = "src/board_blinky.zig" },
.{ .target = mb.ports.ch32v.boards.ch32v203.suzuduino_uno_v1b, .name = "suzuduino_usb_cdc", .file = "src/usb_cdc.zig" },
.{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_usb_cdc", .file = "src/usb_cdc.zig" },
.{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_dma", .file = "src/dma.zig" },
.{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_ws2812", .file = "src/ws2812.zig" },
.{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_uart_echo", .file = "src/uart_echo.zig" },
Expand Down
24 changes: 4 additions & 20 deletions examples/wch/ch32v/src/usb_cdc.zig
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,10 @@ const microzig = @import("microzig");
const hal = microzig.hal;
const board = microzig.board;
const time = hal.time;
const gpio = hal.gpio;
const usb = microzig.core.usb;
const USB_Serial = usb.drivers.CDC;

const RCC = microzig.chip.peripherals.RCC;

const usart = hal.usart.instance.USART1;

const usart_tx_pin = gpio.Pin.init(0, 9); // PA9
const uart = board.uart_setup;

pub const std_options = microzig.std_options(.{
.logFn = hal.usart.log,
Expand Down Expand Up @@ -53,20 +48,9 @@ pub fn main() !void {
// Board brings up clocks and time
microzig.board.init();
microzig.hal.init();
// Enable peripheral clocks for USART1 and GPIOA
RCC.APB2PCENR.modify(.{
.IOPAEN = 1, // Enable GPIOA clock
.IOPCEN = 1,
.AFIOEN = 1, // Enable AFIO clock
.USART1EN = 1, // Enable USART1 clock
});
// Configure TX pin as alternate function push-pull
usart_tx_pin.set_output_mode(.alternate_function_push_pull, .max_50MHz);

// Initialize USART1 at 115200 baud
usart.apply(.{ .baud_rate = 115200 });

hal.usart.init_logger(usart);

uart.apply(.{ .baud_rate = 115200 });
hal.usart.init_logger(uart.instance);
std.log.info("UART logging initialized.", .{});

std.log.info("Initializing USB device.", .{});
Expand Down
7 changes: 7 additions & 0 deletions port/wch/ch32v/src/boards/CH32V307V-R1-1v0.zig
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,13 @@ pub const clock_config: ch32v.clocks.Config = .{
/// CPU frequency is derived from clock config
pub const cpu_frequency = clock_config.target_frequency;

/// Default UART: USART1 on PA9/PA10
pub const uart_setup: ch32v.usart.Setup = .{
.instance = .USART1,
.tx_pin = ch32v.gpio.Pin.init(0, 9), // PA9
.rx_pin = ch32v.gpio.Pin.init(0, 10), // PA10
};

/// Board-specific init: set 48 MHz clocks for the CPU and USBHS, enable SysTick time
pub fn init() void {
ch32v.clocks.init(clock_config);
Expand Down
6 changes: 6 additions & 0 deletions port/wch/ch32v/src/boards/LANA_TNY.zig
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,11 @@ pub const microzig = @import("microzig");
pub const chip = @import("chip");
const ch32v = microzig.hal;

pub const product_string = "LANA TNY";

/// CH32V203G6U6 has USBD (PMA-based), not USBFS/OTG
pub const usb_driver: ch32v.UsbDriver = .usbd;

/// Clock configuration for this board
pub const clock_config: ch32v.clocks.Config = .{
.source = .hsi,
Expand All @@ -18,6 +23,7 @@ pub const cpu_frequency = clock_config.target_frequency;
pub fn init() void {
ch32v.clocks.init(clock_config);
ch32v.time.init();
ch32v.clocks.enable_usbd_clock();
}

/// Default UART: USART2 on PA2 (exposed on the board header)
Expand Down
7 changes: 7 additions & 0 deletions port/wch/ch32v/src/boards/Suzuduino_Uno_V1b.zig
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,13 @@ pub const clock_config: ch32v.clocks.Config = .{
/// CPU frequency is derived from clock config
pub const cpu_frequency = clock_config.target_frequency;

/// Default UART: USART1 on PA9/PA10
pub const uart_setup: ch32v.usart.Setup = .{
.instance = .USART1,
.tx_pin = ch32v.gpio.Pin.init(0, 9), // PA9
.rx_pin = ch32v.gpio.Pin.init(0, 10), // PA10
};

pub const pin_config = ch32v.pins.GlobalConfiguration{
.GPIOA = .{
.PIN5 = .{
Expand Down
10 changes: 9 additions & 1 deletion port/wch/ch32v/src/hals/ch32v20x.zig
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,15 @@ pub const i2c = @import("i2c.zig");
pub const usart = @import("usart.zig");
pub const spi = @import("spi.zig");
pub const dma = @import("dma.zig");
pub const usb = @import("usbfs.zig");
pub const UsbDriver = enum { usbd, usbfs };

pub const usb = if (microzig.config.has_board and @hasDecl(microzig.board, "usb_driver"))
switch (microzig.board.usb_driver) {
.usbd => @import("usbd.zig"),
.usbfs => @import("usbfs.zig"),
}
else
@import("usbfs.zig");

/// HSI (High Speed Internal) oscillator frequency
/// This is the fixed internal RC oscillator frequency for CH32V20x
Expand Down
18 changes: 18 additions & 0 deletions port/wch/ch32v/src/hals/clocks.zig
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,7 @@ const peripheral = enum {
TIM2,
TIM3,
TIM4,
USBD,
};

pub fn enable_peripheral_clock(p: peripheral) void {
Expand All @@ -81,6 +82,7 @@ pub fn enable_peripheral_clock(p: peripheral) void {
.TIM2 => RCC.APB1PCENR.modify(.{ .TIM2EN = 1 }),
.TIM3 => RCC.APB1PCENR.modify(.{ .TIM3EN = 1 }),
.TIM4 => RCC.APB1PCENR.modify(.{ .TIM4EN = 1 }),
.USBD => RCC.APB1PCENR.modify(.{ .USBDEN = 1 }),
}
}

Expand Down Expand Up @@ -432,6 +434,22 @@ pub fn enable_usbfs_clock() void {
// Enable the AHB clock gate for the USBFS peripheral block.
enable_peripheral_clock(.USBOTG);
}
// ============================================================================
// Enable + configure USBD clocks (PMA-based USB device, APB1).
// ============================================================================
pub fn enable_usbd_clock() void {
const sys_clock = get_sysclk();
switch (sys_clock) {
48_000_000 => RCC.CFGR0.modify(.{ .USBPRE = 0 }),
96_000_000 => RCC.CFGR0.modify(.{ .USBPRE = 1 }),
144_000_000 => RCC.CFGR0.modify(.{ .USBPRE = 2 }),
else => @panic("Unsupported sysclock for USBD"),
}

// Enable the APB1 clock gate for the USBD peripheral.
enable_peripheral_clock(.USBD);
}

// ============================================================================
// Enable + configure USBHS clocks.
// ============================================================================
Expand Down
Loading
Loading