tlb: phytium: update phytium tlb controller driver support to 6.6.0.4#1775
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xiaqian1486 wants to merge 4 commits into
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tlb: phytium: update phytium tlb controller driver support to 6.6.0.4#1775xiaqian1486 wants to merge 4 commits into
xiaqian1486 wants to merge 4 commits into
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Reviewer's GuideUpdates Phytium ARM64 support by refining TLB flush limits and kernel-range flushing, extending Phytium codec drivers, correcting Phytium CPU model IDs and SoC-type detection, and adding new devfreq drivers for Phytium DMU and NOC with ACPI-based frequency control for v1/v2 hardware variants. Sequence diagram for Phytium DMU devfreq ACPI-based frequency changesequenceDiagram
participant DevfreqCore
participant PhytiumDMU as phytium_dmufreq
participant ACPI as ACPI_Firmware
participant DMUHW as DMU_HW
DevfreqCore->>PhytiumDMU: phytium_dmu_get_dev_status(stat)
alt DMU_V1
PhytiumDMU->>DMUHW: dmu_v1_read32(..., DMU_V1_AXI_MONITOR2_L)
PhytiumDMU->>DMUHW: dmu_v1_read32(..., DMU_V1_AXI_MONITOR3_L)
else DMU_V2
PhytiumDMU->>DMUHW: dmu_v2_read32(..., DMU_V2_EVENT_L_CNT)
PhytiumDMU->>DMUHW: dmu_v2_read32(..., DMU_V2_EVENT_H_CNT)
end
PhytiumDMU-->>DevfreqCore: stat.busy_time, stat.total_time
DevfreqCore->>PhytiumDMU: phytium_dmu_target(freq, flags)
PhytiumDMU->>PhytiumDMU: devfreq_recommended_opp()
PhytiumDMU->>PhytiumDMU: phytium_dmu_set_freq(target_rate)
PhytiumDMU->>ACPI: acpi_evaluate_integer("PSCF", args)
ACPI-->>PhytiumDMU: status/ret
PhytiumDMU-->>DevfreqCore: update priv.rate
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Hi @xiaqian1486. Thanks for your PR. I'm waiting for a deepin-community member to verify that this patch is reasonable to test. If it is, they should reply with Once the patch is verified, the new status will be reflected by the I understand the commands that are listed here. DetailsInstructions for interacting with me using PR comments are available here. If you have questions or suggestions related to my behavior, please file an issue against the kubernetes/test-infra repository. |
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Hey - I've left some high level feedback:
- In phytium_dmu.c, the v1 path uses devm_ioremap() and then checks IS_ERR() on the returned pointer, but devm_ioremap() returns NULL on failure rather than an ERR_PTR, so the error handling there will never trigger correctly and should be switched to a NULL check.
- In phytium_noc.c, phytium_nocfreq_probe() uses devm_ioremap_resource() for the v1 path but checks
!priv->reg_noc_v1instead of IS_ERR(), meaning error returns from devm_ioremap_resource() will be misdetected and PTR_ERR() on a non-ERR pointer is incorrect. - The repeated pattern of zeroing
struct phytcodec_cmdviamemset(priv->sharemem_base, 0, sizeof(struct phytcodec_cmd));in multiple Phytium codec v2 callbacks could be factored into a small static helper to avoid duplication and keep the command setup logic consistent in one place.
Prompt for AI Agents
Please address the comments from this code review:
## Overall Comments
- In phytium_dmu.c, the v1 path uses devm_ioremap() and then checks IS_ERR() on the returned pointer, but devm_ioremap() returns NULL on failure rather than an ERR_PTR, so the error handling there will never trigger correctly and should be switched to a NULL check.
- In phytium_noc.c, phytium_nocfreq_probe() uses devm_ioremap_resource() for the v1 path but checks `!priv->reg_noc_v1` instead of IS_ERR(), meaning error returns from devm_ioremap_resource() will be misdetected and PTR_ERR() on a non-ERR pointer is incorrect.
- The repeated pattern of zeroing `struct phytcodec_cmd` via `memset(priv->sharemem_base, 0, sizeof(struct phytcodec_cmd));` in multiple Phytium codec v2 callbacks could be factored into a small static helper to avoid duplication and keep the command setup logic consistent in one place.Help me be more useful! Please click 👍 or 👎 on each comment and I'll use the feedback to improve your reviews.
Perhaps unsurprisingly, I-cache invalidations suffer from performance issues similar to TLB invalidations on certain systems. TLB and I-cache maintenance all result in DVM on the mesh, which is where the real bottleneck lies. Rename the heuristic to point the finger at DVM, such that it may be reused for limiting I-cache invalidations. Reviewed-by: Gavin Shan <gshan@redhat.com> Tested-by: Gavin Shan <gshan@redhat.com> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20230920080133.944717-2-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev> (cherry picked from commit ec1c3b9) Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Xia Qian <xian1486@phytium.com.cn>
MAX_TLBI_RANGE_PAGES pages is covered by SCALE#3 and NUM#31 and it's supported now. Allow TLBI RANGE operation when the number of pages is equal to MAX_TLBI_RANGE_PAGES in __flush_tlb_range_nosync(). Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Ryan Roberts <ryan.roberts@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Shaoqin Huang <shahuang@redhat.com> Link: https://lore.kernel.org/r/20240405035852.1532010-4-gshan@redhat.com Signed-off-by: Will Deacon <will@kernel.org> (cherry picked from commit 73301e4) Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Xia Qian <xiaqian1486@phytium.com.cn>
The __flush_tlb_range_limit_excess() helper will be used when flush tlb kernel range soon. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20240923131351.713304-2-wangkefeng.wang@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit 7ffc13e) Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Xia Qian <xiaqian1486@phytium.com.cn>
Currently the kernel TLBs is flushed page by page if the target VA range is less than MAX_DVM_OPS * PAGE_SIZE, otherwise we'll brutally issue a TLBI ALL. But we could optimize it when CPU supports TLB range operations, convert to use __flush_tlb_range_op() like other tlb range flush to improve performance. Co-developed-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20240923131351.713304-3-wangkefeng.wang@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> (cherry picked from commit a923705) [KF: no lpa2 support] Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Xia Qian <xiaqian1486@phytium.com.cn>
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/LGTM |
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Pull request overview
This PR updates Phytium ARM64 platform support by refining arm64 TLB range flushing behavior, introducing Phytium ACPI-based devfreq drivers (DMU/NOC), adding SoC identification infrastructure, and adjusting a couple of ASoC codec drivers.
Changes:
- Improve arm64 TLB range flushing limits/behavior and refactor kernel-range flushing to use the range helper.
- Add unified Phytium NOC/DMU devfreq drivers (ACPI) and wire them into devfreq Kconfig/Makefile and the deepin arm64 defconfig.
- Add Phytium SoC-type detection plumbing and update Phytium CPU part identifiers; refine Phytium codec-v2 and ES8388 codec handling.
Reviewed changes
Copilot reviewed 16 out of 16 changed files in this pull request and generated 16 comments.
Show a summary per file
| File | Description |
|---|---|
| sound/soc/codecs/phytium-codec-v2.h | Adds named codec status codes. |
| sound/soc/codecs/phytium-codec-v2.c | Uses named status codes, clears shared command memory before issuing commands, caches channel count. |
| sound/soc/codecs/Kconfig | Restricts Phytium codec v2 to ARCH_PHYTIUM. |
| sound/soc/codecs/es8388.c | Updates version string and adjusts probe init writes with partial error handling. |
| MAINTAINERS | Adds new Phytium arm64 header to maintained paths. |
| drivers/devfreq/phytium_noc.c | New Phytium NOC devfreq driver (ACPI, v1/v2). |
| drivers/devfreq/phytium_dmu.c | New Phytium DMU devfreq driver (ACPI, v1/v2) with PMU notifier integration. |
| drivers/devfreq/Makefile | Builds new Phytium devfreq drivers when enabled. |
| drivers/devfreq/Kconfig | Adds Kconfig entries for the new Phytium devfreq drivers. |
| arch/arm64/kernel/setup.c | Initializes and exports detected Phytium SoC type. |
| arch/arm64/kernel/proton-pack.c | Updates Spectre mitigation MIDR tables for renamed Phytium CPU part. |
| arch/arm64/kernel/cpufeature.c | Updates MIDR table for renamed Phytium CPU part. |
| arch/arm64/include/asm/tlbflush.h | Renames MAX_* macro, adds flush limit helper, refactors kernel-range flush to use range op helper. |
| arch/arm64/include/asm/phytium_cputype.h | New SoC identification header and helpers. |
| arch/arm64/include/asm/cputype.h | Renames Phytium CPU part/MIDR macro FTC303 -> FTC310. |
| arch/arm64/configs/deepin_arm64_desktop_defconfig | Enables new Phytium devfreq drivers as modules. |
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| // SPDX-License-Identifier: GPL-1.0 | |||
| @@ -0,0 +1,654 @@ | |||
| // SPDX-License-Identifier: GPL-1.0 | |||
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| if (info->type == PHYTIUM_NOC_V1) { | ||
| priv->reg_noc_v1 = devm_ioremap_resource(dev, mem); | ||
| if (!priv->reg_noc_v1) | ||
| return PTR_ERR(priv->reg_noc_v1); | ||
| dev->init_name = "nocfreq"; | ||
| } else { |
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| acpi_handle handle = ACPI_HANDLE(dev); | ||
| unsigned long long uid; | ||
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| ret = acpi_evaluate_integer(handle, "_UID", NULL, &uid); | ||
| priv->uid = uid; | ||
| priv->reg_noc_v2 = devm_ioremap_resource(dev, mem); |
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| ret = devfreq_resume_device(priv->devfreq); | ||
| if (ret < 0) | ||
| dev_err(dev, "failed to resume the devfreq devices\n"); | ||
| if (!delayed_work_pending(&priv->devfreq->work) && priv->devfreq->profile->polling_ms) | ||
| priv->devfreq->stop_polling = true; | ||
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| static inline bool __flush_tlb_range_limit_excess(unsigned long start, | ||
| unsigned long end, unsigned long pages, unsigned long stride) | ||
| { | ||
| /* | ||
| * When the system does not support TLB range based flush | ||
| * operation, (MAX_DVM_OPS - 1) pages can be handled. But | ||
| * with TLB range based operation, MAX_TLBI_RANGE_PAGES | ||
| * pages can be handled. | ||
| */ | ||
| if ((!system_supports_tlb_range() && | ||
| (end - start) >= (MAX_DVM_OPS * stride)) || | ||
| pages > MAX_TLBI_RANGE_PAGES) | ||
| return true; | ||
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| return false; | ||
| } |
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| enum phytcodec_status { | ||
| ERR_CODEC_SUCCESS = 0, | ||
| ERR_CODEC_BUS_BUSY, | ||
| ERR_CODEC_DEV_BUSY, | ||
| ERR_CODEC_RW_ERROR, | ||
| ERR_CODEC_NODEV, //HW | ||
| ERR_CODEC_NO_INIT, //SW | ||
| }; |
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| switch (status) { | ||
| case 0: | ||
| case ERR_CODEC_SUCCESS: | ||
| pr_err("success\n"); | ||
| break; |
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| switch (status) { | ||
| case 0: | ||
| case ERR_CODEC_SUCCESS: | ||
| pr_err("success\n"); | ||
| break; | ||
| case 2: | ||
| case ERR_CODEC_DEV_BUSY: | ||
| pr_err("device busy\n"); | ||
| break; | ||
| case 3: | ||
| case ERR_CODEC_RW_ERROR: | ||
| pr_err("read/write error\n"); |
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| ret = snd_soc_component_write(component, ES8388_ADCPOWER, 0xf0); | ||
| if (ret) | ||
| return ret; | ||
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| snd_soc_component_write(component, ES8388_CONTROL1, 0x20); | ||
| snd_soc_component_write(component, ES8388_DACCONTROL21, 0x80); | ||
| snd_soc_component_write(component, ES8388_ADCCONTROL10, 0xda); | ||
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New changes are detected. LGTM label has been removed. |
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This patches updates the support for phytium tbl controller driver.
Summary by Sourcery
Update Phytium ARM64 platform support with improved TLB range handling, new SoC identification and frequency-scaling drivers, and refinements to audio codec drivers.
New Features:
Bug Fixes:
Enhancements:
Build:
Chores: