feat(validation): cover every hal-st peripheral driver on NUCLEO-WB55RG/WBA55CG and fix the drivers it exercises

.gitleaks.toml

@@ -4,7 +4,11 @@ title = "secret scan config"
 useDefault = true
 
 [allowlist]
-description = "Generated KiCad footprint cache — datasheet URLs, not secrets"
+description = "Generated KiCad footprint cache (datasheet URLs) and the public NIST AES-128 test-vector keys of the validation suite, not secrets"
 paths = [
   '''integration_test/pcb/integration_test_board/fp-info-cache''',
 ]
+regexes = [
+  '''000102030405060708090a0b0c0d0e0f''',
+  '''2b7e151628aed2a6abf7158809cf4f3c''',
+]

hal_st/stm32fxxx/AdcDmaStm.cpp

@@ -1,5 +1,7 @@
 #include "hal_st/stm32fxxx/AdcDmaStm.hpp"
 #include "infra/event/EventDispatcher.hpp"
+#include "infra/util/ReallyAssert.hpp"
+#include <algorithm>
 
 namespace hal
 {
@@ -59,7 +61,14 @@ namespace hal
 
         timer.Start();
         Configure();
+#if defined(STM32WB) || defined(STM32WBA)
+        const auto samples = std::min(numberOfSamples, buffer.size());
+        really_assert(samples != 0);
+        measurement = infra::Head(buffer, samples);
+        dmaStream.StartReceive(measurement);
+#else
         dmaStream.StartReceive(buffer);
+#endif
         LL_ADC_REG_StartConversion(adc.Handle().Instance);
     }
 
@@ -91,6 +100,13 @@ namespace hal
 
     void AdcTriggeredByTimerWithDma::TransferDone()
     {
+#if defined(STM32WB) || defined(STM32WBA)
+        // External-trigger mode keeps ADSTART set, and ADC_Disable refuses while it is set
+        LL_ADC_REG_StopConversion(adc.Handle().Instance);
+        while (LL_ADC_REG_IsStopConversionOngoing(adc.Handle().Instance))
+        {
+        }
+#endif
         auto result = ADC_Disable(&adc.Handle());
         assert(result == HAL_OK);
 
@@ -99,7 +115,11 @@ namespace hal
         if (this->onDone)
             infra::EventDispatcher::Instance().Schedule([this]()
                 {
+#if defined(STM32WB) || defined(STM32WBA)
+                    onDone(measurement);
+#else
                     onDone(buffer);
+#endif
                 });
     }
 }

hal_st/stm32fxxx/AdcDmaStm.hpp

@@ -32,6 +32,9 @@ namespace hal
         AnalogPinStm analogPin;
         FreeRunningTimerStm timer;
         infra::AutoResetFunction<void(infra::MemoryRange<uint16_t>)> onDone;
+#if defined(STM32WB) || defined(STM32WBA)
+        infra::MemoryRange<uint16_t> measurement;
+#endif
     };
 }
 

hal_st/stm32fxxx/BackupRamStm.cpp

@@ -3,6 +3,14 @@
 
 namespace hal
 {
+    BackupRamStm::BackupRamStm()
+    {
+#if defined(STM32WBA)
+        __HAL_RCC_RTCAPB_CLK_ENABLE();
+        HAL_PWR_EnableBkUpAccess();
+#endif
+    }
+
     infra::MemoryRange<volatile uint32_t> BackupRamStm::Get() const
     {
 #if defined(STM32G0)

hal_st/stm32fxxx/BackupRamStm.hpp

@@ -7,9 +7,11 @@
 namespace hal
 {
     class BackupRamStm
-        : hal::BackupRam<volatile uint32_t>
+        : public hal::BackupRam<volatile uint32_t>
     {
     public:
+        BackupRamStm();
+
         infra::MemoryRange<volatile uint32_t> Get() const override;
     };
 }

hal_st/stm32fxxx/DefaultClockNucleoWBA55CG.cpp

@@ -16,6 +16,7 @@
  *            PLL_Q                          = 2
  *            PLL_R                          = 2
  *            Flash Latency(WS)              = 3
+ *            RNG kernel clock               = HSI
  */
 void ConfigureDefaultClockNucleoWBA55CG()
 {
@@ -52,4 +53,14 @@ void ConfigureDefaultClockNucleoWBA55CG()
     RCC_ClkInitStruct.AHB5_PLL1_CLKDivider = RCC_SYSCLK_PLL1_DIV4;
     RCC_ClkInitStruct.AHB5_HSEHSI_CLKDivider = RCC_SYSCLK_HSEHSI_DIV1;
     HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
+
+    LL_RCC_HSI_Enable();
+    while (!LL_RCC_HSI_IsReady())
+    {
+    }
+
+    RCC_PeriphCLKInitTypeDef RCC_PeriphClkInitStruct = { 0 };
+    RCC_PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
+    RCC_PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI;
+    HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInitStruct);
 }

hal_st/stm32fxxx/DmaStm.cpp

@@ -531,6 +531,13 @@ namespace hal
         auto streamRegister = DmaChannel[dmaIndex][streamIndex];
 
 #if defined(GPDMA1)
+#if defined(STM32WBA)
+        const uint32_t log2 = dataSizeInBytes == 4 ? 2 : (dataSizeInBytes == 2 ? 1 : 0);
+        if (!(streamRegister->CTR2 & DMA_MEMORY_TO_MEMORY) && (streamRegister->CTR2 & DMA_MEMORY_TO_PERIPH))
+            MODIFY_REG(streamRegister->CTR1, DMA_CTR1_DDW_LOG2, log2 << DMA_CTR1_DDW_LOG2_Pos);
+        else if (!(streamRegister->CTR2 & DMA_MEMORY_TO_MEMORY))
+            MODIFY_REG(streamRegister->CTR1, DMA_CTR1_SDW_LOG2, log2 << DMA_CTR1_SDW_LOG2_Pos);
+#else
         dataSizeInBytes &= 0x03;
         uint32_t mask{ 0 };
         if (!(streamRegister->CTR2 & DMA_MEMORY_TO_MEMORY) && (streamRegister->CTR2 & DMA_MEMORY_TO_PERIPH))
@@ -539,8 +546,11 @@ namespace hal
             mask = (dataSizeInBytes >> 1) << DMA_CTR1_SDW_LOG2_Pos;
 
         streamRegister->CTR1 = (streamRegister->CTR1 & ~mask) | (streamRegister->CTR1 | mask);
+#endif
 #elif defined(DMA_SxCR_PSIZE)
         streamRegister->CR = (streamRegister->CR & ~DMA_SxCR_PSIZE) | ((dataSizeInBytes & 1) == 0 ? DMA_SxCR_PSIZE_0 : 0) | (dataSizeInBytes > 2 ? DMA_SxCR_PSIZE_1 : 0);
+#elif defined(STM32WB)
+        streamRegister->CCR = (streamRegister->CCR & ~DMA_CCR_PSIZE) | (dataSizeInBytes == 2 ? DMA_CCR_PSIZE_0 : 0) | (dataSizeInBytes == 4 ? DMA_CCR_PSIZE_1 : 0);
 #else
         streamRegister->CCR = (streamRegister->CCR & ~DMA_CCR_PSIZE) | ((dataSizeInBytes & 1) == 0 ? DMA_CCR_PSIZE_0 : 0) | (dataSizeInBytes > 2 ? DMA_CCR_PSIZE_1 : 0);
 #endif
@@ -550,6 +560,13 @@ namespace hal
     {
         auto streamRegister = DmaChannel[dmaIndex][streamIndex];
 #if defined(GPDMA1)
+#if defined(STM32WBA)
+        const uint32_t log2 = dataSizeInBytes == 4 ? 2 : (dataSizeInBytes == 2 ? 1 : 0);
+        if (!(streamRegister->CTR2 & DMA_MEMORY_TO_MEMORY) && (streamRegister->CTR2 & DMA_MEMORY_TO_PERIPH))
+            MODIFY_REG(streamRegister->CTR1, DMA_CTR1_SDW_LOG2, log2 << DMA_CTR1_SDW_LOG2_Pos);
+        else if (!(streamRegister->CTR2 & DMA_MEMORY_TO_MEMORY))
+            MODIFY_REG(streamRegister->CTR1, DMA_CTR1_DDW_LOG2, log2 << DMA_CTR1_DDW_LOG2_Pos);
+#else
         dataSizeInBytes &= 0x03;
         uint32_t mask{ 0 };
         if (!(streamRegister->CTR2 & DMA_MEMORY_TO_MEMORY) && (streamRegister->CTR2 & DMA_MEMORY_TO_PERIPH))
@@ -558,8 +575,11 @@ namespace hal
             mask = (dataSizeInBytes >> 1) << DMA_CTR1_DDW_LOG2_Pos;
 
         streamRegister->CTR1 = (streamRegister->CTR1 & ~mask) | (streamRegister->CTR1 | mask);
+#endif
 #elif defined(DMA_SxCR_MSIZE)
         streamRegister->CR = (streamRegister->CR & ~DMA_SxCR_MSIZE) | ((dataSizeInBytes & 1) == 0 ? DMA_SxCR_MSIZE_0 : 0) | (dataSizeInBytes > 2 ? DMA_SxCR_MSIZE_1 : 0);
+#elif defined(STM32WB)
+        streamRegister->CCR = (streamRegister->CCR & ~DMA_CCR_MSIZE) | (dataSizeInBytes == 2 ? DMA_CCR_MSIZE_0 : 0) | (dataSizeInBytes == 4 ? DMA_CCR_MSIZE_1 : 0);
 #else
         streamRegister->CCR = (streamRegister->CCR & ~DMA_CCR_MSIZE) | ((dataSizeInBytes & 1) == 0 ? DMA_CCR_MSIZE_0 : 0) | (dataSizeInBytes > 2 ? DMA_CCR_MSIZE_1 : 0);
 #endif

hal_st/stm32fxxx/FlashCoordinatedWithWirelessStack.cpp

@@ -208,11 +208,23 @@ namespace hal
     {
         if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD))
         {
-            __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ECCD);
             const uint32_t errorAddress = READ_BIT(FLASH->ECCR, FLASH_ECCR_ADDR_ECC);
+            __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ECCD);
+
+            if (pFlash.Lock == HAL_LOCKED || __HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
+                return;
+
+            // An unlocked FLASH_CR belongs to an interrupted WriteBuffer/EraseSectors, which must find it still unlocked
+            const bool wasLocked = READ_BIT(FLASH->CR, FLASH_CR_LOCK) != 0;
+            if (wasLocked && HAL_FLASH_Unlock() != HAL_OK)
+                return;
+
             uint32_t pageError = 0;
-            FLASH_EraseInitTypeDef eraseInitStruct{ .TypeErase = FLASH_TYPEERASE_PAGES, .Page = flash.SectorOfAddress(errorAddress), .NbPages = 1 };
+            FLASH_EraseInitTypeDef eraseInitStruct{ .TypeErase = FLASH_TYPEERASE_PAGES, .Page = (errorAddress * 8U) / FLASH_PAGE_SIZE, .NbPages = 1 };
             HAL_FLASHEx_Erase(&eraseInitStruct, &pageError);
+
+            if (wasLocked)
+                HAL_FLASH_Lock();
         }
     }
 

hal_st/stm32fxxx/FlashInternalStm.cpp

@@ -89,7 +89,10 @@ namespace hal
     {
         HAL_FLASH_Unlock();
 
-#if defined(STM32WB) || defined(STM32G4) || defined(STM32G0) || defined(STM32WBA)
+#if defined(STM32WB) || defined(STM32WBA)
+        const auto regionOffset = reinterpret_cast<uint32_t>(flashMemory.begin()) - FLASH_BASE;
+        detail::ErasePages((regionOffset + AddressOfSector(beginIndex)) / FLASH_PAGE_SIZE, (regionOffset + AddressOfSector(endIndex)) / FLASH_PAGE_SIZE);
+#elif defined(STM32G4) || defined(STM32G0)
         uint32_t pageError = 0;
 
         FLASH_EraseInitTypeDef eraseInitStruct;

hal_st/stm32fxxx/FlashInternalStmDetail.hpp

@@ -2,7 +2,9 @@
 #define HAL_FLASH_INTERNAL_STM_DETAIL_HPP
 
 #include DEVICE_HEADER
+#include "infra/util/ReallyAssert.hpp"
 #include "services/flash/FlashAlign.hpp"
+#include <algorithm>
 #include <cstdint>
 
 namespace hal
@@ -53,6 +55,36 @@ namespace hal
                 chunk = flashAlign.Next();
             }
         }
+
+#if defined(STM32WB) || defined(STM32WBA)
+        inline void ErasePages(uint32_t page, uint32_t endPage)
+        {
+#if defined(FLASH_DBANK_SUPPORT)
+            const uint32_t pagesPerBank = FLASH_PAGE_NB;
+            const bool swapped = READ_BIT(FLASH->OPTR, FLASH_OPTR_SWAP_BANK) != 0;
+#endif
+
+            while (page != endPage)
+            {
+                FLASH_EraseInitTypeDef eraseInitStruct{};
+                eraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
+#if defined(FLASH_DBANK_SUPPORT)
+                const uint32_t bankEndPage = std::min(endPage, (page / pagesPerBank + 1) * pagesPerBank);
+                eraseInitStruct.Banks = (page >= pagesPerBank) == swapped ? FLASH_BANK_1 : FLASH_BANK_2;
+                eraseInitStruct.Page = page % pagesPerBank;
+#else
+                const uint32_t bankEndPage = endPage;
+                eraseInitStruct.Page = page;
+#endif
+                eraseInitStruct.NbPages = bankEndPage - page;
+
+                uint32_t pageError = 0;
+                auto result = HAL_FLASHEx_Erase(&eraseInitStruct, &pageError);
+                really_assert(result == HAL_OK);
+                page = bankEndPage;
+            }
+        }
+#endif
     }
 }
 

hal_st/stm32fxxx/GeneratePeripheralTableStructure.xsl

@@ -68,15 +68,15 @@
   <xsl:template match="mcu:IP">
     <xsl:param name="ip-name"/>
     <xsl:param name="prefix"/>
-    <xsl:if test="@Name = $ip-name">
+    <xsl:if test="@Name = $ip-name or @Name = concat('_', $ip-name)">
       <item>
         <xsl:attribute name="name"><xsl:value-of select="@InstanceName"/></xsl:attribute>
         <xsl:choose>
-          <xsl:when test="$prefix = '' and @InstanceName = @Name">
+          <xsl:when test="$prefix = '' and @InstanceName = $ip-name">
             <xsl:attribute name="position">1</xsl:attribute>
           </xsl:when>
-          <xsl:when test="$prefix = '' and @InstanceName != @Name">
-            <xsl:attribute name="position"><xsl:value-of select="substring(@InstanceName, string-length(@Name) + 1)"/></xsl:attribute>
+          <xsl:when test="$prefix = '' and @InstanceName != $ip-name">
+            <xsl:attribute name="position"><xsl:value-of select="substring(@InstanceName, string-length($ip-name) + 1)"/></xsl:attribute>
           </xsl:when>
           <xsl:otherwise>
             <xsl:attribute name="position"><xsl:value-of select="substring(@InstanceName, string-length($prefix) + 1)"/></xsl:attribute>