report unordered fcom results in the status word - #21
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fcom compared with total_cmp, which always produces an ordering, so the status word could never carry C2. After fnstsw/sahf that bit becomes PF, and the jp/jnp MSVC emits around every float compare exists precisely to catch it: a NaN operand looked like an ordered result. total_cmp also ordered -0.0 below +0.0 where the hardware calls them equal. Compare with partial_cmp instead and map None to C0|C2|C3, as the FPU does. The checked-in chillin and mofo output assigns fpu.cmp directly, so it is updated in the same step; the inputs to rerun tc are not in the repo, so the change was applied by hand and formatted with rustfmt, which is what tc would have emitted. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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I also had GPT 6 Pro review this PR and it concluded that the emulation is accurate |
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From Claude:
Follow-up to #19. Looking into the review note there: the integer ops in runtime/src/ops do already set PF, but the FPU compare path could never produce it. fcom used total_cmp, which always yields an ordering, so C2 was never set in the status word, and after fnstsw/sahf that is the bit the jp/jnp around every MSVC float compare is testing. A NaN operand looked like an ordered result. total_cmp also ordered -0.0 below +0.0.
This switches to partial_cmp and maps None to C0|C2|C3 as the hardware does, with tests pinning the C2 -> PF linkage. The checked-in chillin and mofo output assigns fpu.cmp directly so it is updated in the same commit; the tc inputs aren't in the repo, so that change was applied by hand and rustfmt'd, which matches what tc emits.
First commit is just cargo fmt for the match arm merged in #19.