Add cortexx925 and cortexa725 sub-configs for NVIDIA GB10#939
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jeffhammond wants to merge 2 commits into
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Add cortexx925 and cortexa725 sub-configs for NVIDIA GB10#939jeffhammond wants to merge 2 commits into
jeffhammond wants to merge 2 commits into
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Add two ARM sub-configs for the NVIDIA GB10 (DGX Spark) CPU, named by
microarchitecture per BLIS convention (cortexa57, firestorm, ...):
- cortexx925: for the Cortex-X925 performance cores (part 0xd85, 6 FP
pipes x 128-bit NEON, 2 MB L2), -mcpu=cortex-x925, block sizes
MC=336/KC=336. This is the config used for GB10: its Cortex-A725
efficiency cores (part 0xd87) also select it, so one context runs
across the heterogeneous chip.
- cortexa725: a standalone config for non-GB10 Cortex-A725 hardware
(2 FP pipes, 512 KB L2), -mcpu=cortex-a725, MC=96/KC=384 to fit the
smaller L2. Not in the arm64 umbrella; build explicitly.
Both reuse the armv8a NEON asm micro-kernels (6x8 dgemm / 8x12 sgemm; SVE2
is VL=128b so it offers nothing over NEON) and wire the armv8a SUP path.
Autodetection maps parts 0xd85/0xd87 -> cortexx925 (0xd87 -> cortexa725 in
a cortexa725-only build), with the enum/string/family/gentconf entries and
the ARM_CPU_PART_CORTEX_{X925,A725} MIDR macros added.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
-mcpu=cortex-x925 and -mcpu=cortex-a725 were added to gcc in 14 and to clang in 19, so older compilers reject them. Mirror the existing armsve handling and add these configs to the compiler blacklist for gcc<14 / clang<19 (and Apple clang, which does not yet target these Armv9.2 cores). This keeps the arm64 umbrella buildable with older toolchains (e.g. CI's gcc-10 job): the unsupported sub-configs are dropped with a warning instead of failing the build. Verified: gcc-13 blacklists both and arm64 still configures cleanly; gcc-16 keeps them. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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@jeffhammond can you mark this (and any other related PRs) as draft so that they don't trigger CI for works in progress? |
jeffhammond
marked this pull request as draft
July 16, 2026 15:24
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I'm done with them for now. Feel free to flip to ready once you have a chance to decide they are worthwhile. |
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Add two ARM sub-configs for the NVIDIA GB10 (DGX Spark) CPU, named by microarchitecture per BLIS convention (cortexa57, firestorm, ...):
Both reuse the armv8a NEON asm micro-kernels (6x8 dgemm / 8x12 sgemm; SVE2 is VL=128b so it offers nothing over NEON) and wire the armv8a SUP path. Autodetection maps parts 0xd85/0xd87 -> cortexx925 (0xd87 -> cortexa725 in a cortexa725-only build), with the enum/string/family/gentconf entries and the ARM_CPU_PART_CORTEX_{X925,A725} MIDR macros added.