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Post-M3.H Studio: firmware identity, guarded PTP recovery, USB and operator UX acceptance #300

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Description

@masarray

Purpose

Single canonical post-M3.H engineering backlog for Studio operator visibility, device lifecycle and PTP error recovery. This is not part of the already published M3.H Public Stable Lab Simulator. Preserve main as the new development base and keep firmware Build ID a922e9bdba4e57a4 and all release binaries immutable.

Retired historical PR candidates (source preserved, not silently merged)

All are old stacked/divergent branches from before validated M3.H firmware, not approved as current product fixes. The cited branch SHAs remain reachable; do not use old PR's merge button or copy raw embedded code. For each item, compare actual function-level behavior with current main and mark either already implemented, obsolete, or still missing with a unit/UI reproducer.

Acceptance for future new PR from current main

  • Verify selected ESP32-P4 identity with exact firmware Build ID, not only semantic v0.1.1.
  • Before modifying PTP role, inspect true board state; bounded STOP/ACK/readback with no stale apparent OFF, no silent role-force and no automatic SV start.
  • All errors (link disconnected, serial mismatch, phase unqualified, START refused, timeout) have concise actionable Studio presentation; never hide substantive errors behind a transient success toast.
  • 4I+4V operator values and actual wire transaction have a testable SSOT; no partial intermediate updates claimed atomic without firmware ACK proof.
  • Windows Qt and deterministic harness CI, USB disconnect/reconnect and operator-view screenshot evidence on exact new source SHA.
  • Regression against M3.H 4 kHz, PTP SOURCE continuity and smpSynch AUTO; capture and checksum paired with newly built firmware. Do not overwrite M3.H release assets.
  • Physical test evidence for stale-role/USB fault paths that depend on hardware.

This issue owns the unimplemented remainder only. M3.H release-to-main ledger. Related: #42 (atomic live SV), #287 (actual external GM PTP failure), #154 and #162 (physical PTP/SV acceptance).

Activity

  1. masarray commented on Oct 25, 2026

    @masarray
    OwnerAuthor

    25 Oct 2026 reconciliation checkpoint — operator UI implemented, physical acceptance not implied

    • PR #327 merged canonical SV Ethernet TX fault evidence, bounded per-burst sync revocation and no unsafe auto-restart.
    • PR #328 merged session-aware stale-SVLIFE suppression and color-coded COM connection indicator; source/Qt/Windows lifecycle and installer CI passed. Owner-supplied physical Windows screenshots show COM15 READY and RUNNING, one telemetry snapshot ~3999 fps, missed0, txfail0.
    • M3.H.2 RC1 prerelease exposes packaged same-SHA Windows GUI+firmware for further field testing; unchanged M3.H.1 remains latest Public Stable.
    • Open physical gates remain: PTP stale-role/USB fault injection, long duration 4kHz stability and independent recipient NIC SV capture + ARSAS/DigSubAnalyzer acceptance in Community feedback: SV receiver visibility, VLAN and APPID/svID setup in lab analyzers #324. Do not equate Qt synthetic tests or observed RUNNING indicator with those gates.

    Maintain this issue OPEN for the unresolved engineering acceptance; do not merge the old pre-M3.H divergent PR stack.

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