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AES-GCM x86-64: AES-NI+AVX encryption loop takes every block from 16 on - #1684
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…on (WIP) Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01FoYWDDEDFq1DFev5X7n2aq
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01FoYWDDEDFq1DFev5X7n2aq
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01FoYWDDEDFq1DFev5X7n2aq
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What
On the AES-NI+AVX backend (
_aesni_pclmul_avx),vg_aes_gcm_encrypt_blocksinterleaved counter mode and GHASH only over the first16 ⌊n / 16⌋blocks. It encrypted the rest withvg_aes_ctr32_aesniand hashed them withvg_ghash_pclmul. At 384 B, for example, 8 of the 24 blocks took that path, at about 60 ns.The encryption loop (
Impl.Gcm.X86_64.StitchAvx8.encFor) now takes every block from 16 on, andBlocks.stitchPartgives it all of them (full, as the AVX-512 prepared loop already does):n = 16 + 8 k + tblocks it stops witht < 8blocks left, rather than requiringnto be a multiple of 16.t > 0,tailTencrypts the 8 counters the pipeline has already prepared (ksTail, stored atscratch + 832). It advances the counter bytand points at the powersH'ᵗ … H'(tailSetup). It then runs the AVX-512 loop's verified per-block body (StitchZH.remBody/remNext) over thetblocks: XOR with the keystream, store, and accumulate the product with the block's power. Finally it does one reduction intoY(tailEnd).r9(the number of blocks) is public, so the branch and the loop are covered by the existing constant-time check, now run onstitchPart … full.Decryption is unchanged.
This is part of #1228, following the rustls analysis in #991. It addresses the AES-NI+AVX backend's gap in the 256 B–1 KiB range.
encrypt_in_placeandAesGcm::encrypt's copy-and-seal path for short texts both reach this code throughseal.Measurements
Measured with the AES-NI+AVX backend chosen:
VG_CPU_FEATURES=avx,avx2,avx512f,avx512bw,avx512vl,bmi1,bmi2,adx,aes,pclmulqdq,ssse3, and aws-lc-rs masked to the same withOPENSSL_ia32cap='~0x0:~0x574220200000'. The machine is a Xeon, pinned to one core, with a 16-byte key and 13-byte AAD. Each cell is best-of-11 in ns, two alternating runs, main → this PR. "+1" isAesGcm::encryptofn + 1bytes from two slices; for aws-lc-rs it is copy plusseal_in_place_separate_tag.The largest gain is in-place encryption at 384 B: 24% faster, now within about 10% of aws-lc-rs.
Proofs
Assembly comes only from the Lean code. Spec, TCB and contracts are unchanged.
Proof/Gcm/X86_64/StitchAvx8/Tail.lean(new) proves the tail (tail_ok). It reusesStitchZH.remLoop_ok, and aTailLawthatOk.leanproves of the setup's powers, asremZdoes for the AVX-512 tables.nb mod 16 = 0.StitchAvx8.enc_okholds for anynb ≥ 16.StitchImplgainsfullandokFull, andStitchImpl.codepasses them toStitchCode. The base-contextencrypt_blocksinstances passfulltoBlocks.encrypt. OnlyStitchName.aesniAvxsets it.block_counts_agree: every block count from 16 to 41, whole or with 5 extra bytes, for 128-, 192- and 256-bit keys. It runs on every detected backend and compares against the scalar baseline.🤖 Generated with Claude Code
https://claude.ai/code/session_01FoYWDDEDFq1DFev5X7n2aq
Generated by Claude Code