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TCB: AArch64 CLZ and RBIT - #2713
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CLZ counts the zero bits above the highest one bit of a register (the register's width if it is zero), and RBIT reverses its bits (DDI 0487 C6.2, CLZ and RBIT, with CountLeadingZeroBits from the shared pseudocode), in both the 32- and 64-bit forms. They are baseline A64, so they require no CPU feature, and Arm lists both among the data-independent-time instructions (DDI 0487, About PSTATE.DIT). The model uses core's BitVec.clz and BitVec.reverse. Together they count trailing zeros (RBIT then CLZ), which a variable-time inverse of a public scalar needs. Framework: Inline.dstOf, TaintMono.gprDst and the taint step (Taint.stepFn, with its soundness cases) handle them. VerifiedGarbageTest.AArch64Bits checks their semantics, printing, requirements and taint. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01Ma2fA9rUTPXEEQjYyCMCRw
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Part of #991.
This is a trust change (
TCB/AArch64/Isa.lean,TCB/AArch64/Print.lean). It adds two instructions to the AArch64 model and nothing else in it; noSpec/,Impl/or artifact changes.The instructions
clz d, n(CLZ, 32- and 64-bit): the number of zero bits above the highest one bit ofn, the register's width ifnis zero. DDI 0487 C6.2, CLZ:result = CountLeadingZeroBits(X[n, datasize]); X[d, datasize] = result<datasize-1:0>, withCountLeadingZeroBits(x) = N - (HighestSetBit(x) + 1)(shared pseudocode). Modelled with core'sBitVec.clz.rbit d, n(RBIT, 32- and 64-bit): the bits ofnin reverse order. DDI 0487 C6.2, RBIT:for i = 0 to datasize-1: result<datasize-1-i> = operand<i>. Modelled with core'sBitVec.reverse.As for every other modelled
W-form instruction, the 32-bit forms read the low half and zero the upper half (State.read/State.write).Requirements: both are baseline A64 (ARMv8.0-A, no
FEAT_*condition in their decode), soInstr.requiresgives[]for them, and the test checks that.Timing: Arm lists CLZ and RBIT among the data-independent-time instructions (DDI 0487, "About PSTATE.DIT"). The model's note listing the data-processing instructions with that property now names them, so the rule against operand-dependent timing is kept.
Why
Together they count trailing zeros (RBIT then CLZ). The next PR uses that for a variable-time inverse of the public scalar
sin AArch64 P-256 verification. Constant-time paths stay for anything secret.Framework and tests
Proof/Framework/AArch64:Inline.dstOf,TaintMono.gprDstand the taint step (Taint.stepFnand its soundness cases) handle them. Their result is as public as their operand.VerifiedGarbageTest/AArch64Bits.lean: CLZ of zero, one, a middle bit and the top bit; the W forms, including that they ignore and clear the upper half; RBIT on both widths; RBIT then CLZ as a trailing-zero count; printing; empty requirements; taint. The RBIT values usedecide +kernel, because elaboration-timedecideexceeds the recursion limit on the 64-bit reversal.lake build,Emit.lean --check(its audits acceptBitVec.clzandBitVec.reverse) and theci/check_*.pyscripts pass. No generated code changes.Generated by Claude Code