Experiment Subgroup 8 for older gpus by rillomas · Pull Request #14 · rillomas/llama.cpp

rillomas · 2026-05-12T05:36:36Z

2df11d7 is passing all test-backend-ops with default (subgroup 32), set GGML_VK_INTEL_DEFAULT_SUBGROUP_SIZE=8 and set GGML_VK_INTEL_DEFAULT_SUBGROUP_SIZE=16 when run on ARL-H U7-265H (Windows, GPU driver: 32.0.101.8801).

f2cf16d passes test-backend-ops and show good gains on specific piplines though seeing regressions on others as well. We shouldn't be seeing regressions so need to check

b5b1ea9 looking pretty good on ARL-H and Arc A770 with only minor regressions. May promote this version as the actual PR

This reverts commit edccd26.

was failing on MUL_MAT(type_a=q4_0,type_b=f32,m=1,n=2048,k=8192,bs=[1,1],nr=[1,1],per=[0,1,2,3],k_v=0,o=1)

…p-for-intel

rillomas · 2026-05-26T05:35:11Z

Following tests fail with 8b38960 on U7-265H (32.0.101.8801) using GGML_VK_INTEL_DEFAULT_SUBGROUP_SIZE=16

  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=16,n_used=16,b=0,m=32,n=1024,k=16)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=2,n_used=2,b=0,m=32,n=8192,k=64)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=16,n_used=16,b=1,m=32,n=1024,k=16)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=2,n_used=2,b=1,m=32,n=8192,k=64)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=bf16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=1,k=256)
  MUL_MAT_ID(type_a=bf16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=32,k=256)

…er-gpus

rillomas · 2026-05-26T06:26:30Z

~~Also seeing Access Violation at pipeline->compiled using a44fc6c when testing on U7-265H with test-backend-ops.exe -o MUL_MAT and GGML_VK_INTEL_DEFAULT_SUBGROUP_SIZE=8~~

[Exception thrown at 0x00007FFDF4AD81F5 (ggml-vulkan.dll) in test-backend-ops.exe: 0xC0000005: Access violation reading location 0x000000000000005A.]

~~It seems pipeline is empty for some reason~~

Update: This seems to be fixed after merge with master

…p-for-intel

…er-gpus

rillomas · 2026-05-26T07:30:52Z

Following tests fail with ac70a70 on U7-265H (32.0.101.8801) using GGML_VK_INTEL_DEFAULT_SUBGROUP_SIZE=16

  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=16,n_used=16,b=0,m=32,n=1024,k=16)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=2,n_used=2,b=0,m=32,n=8192,k=64)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=16,n_used=16,b=1,m=32,n=1024,k=16)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=2,n_used=2,b=1,m=32,n=8192,k=64)
  MUL_MAT_ID_FUSION(type_a=f16,type_b=f32,n_mats=16,n_used=16,b=0,m=32,n=32,k=32,o=3,mul=0)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f32,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=4,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=1,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=2,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=0,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=17,k=256)
  MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=8,n_used=4,b=1,m=512,n=32,k=256)
  MUL_MAT_ID(type_a=bf16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=1,k=256)
  MUL_MAT_ID(type_a=bf16,type_b=f32,n_mats=4,n_used=2,b=0,m=512,n=32,k=256)

rillomas · 2026-06-03T04:34:36Z

For test cases like test-backend-ops perf -o MUL_MAT(type_a=f32,type_b=f32,m=4096,n=512,k=14336,bs=[1,1],nr=[1,1],per=[0,1,2,3],k_v=0,o=1) the default setting with required_subgroup_size=0 is actually better than setting required_subgroup_size=32 since no subgroup size requirement will allow the runtime to choose the best size (subgroup 8) on older Intel GPU. We may need to drop the required_subgroup_size override when it is specified as 0. Or we can specify the preferred size for all pipelines.

rillomas · 2026-06-04T08:31:36Z

For testcase test-backend-ops perf -o MUL_MAT_ID(type_a=f16,type_b=f32,n_mats=128,n_used=8,b=0,m=768,n=64,k=2048) we see better performance on 2df11d7 rather than 37b9637. 2df11d7 did not use the subgroup_min_size_16 path so probably better to use the non-subgroup16 kernel for subgroup 8.

This means that for some matmul_id_* pipelines we need to check if we will override subgroup and switch pipeline settings accordingly

non-subgroup kernel was faster on Subgroup 8

rillomas · 2026-06-08T22:50:29Z

There is a fundamental issue with CREATE_MM macro in which we cannot select if we want to use the subgroup variant kernel or not based on subgroup override settings. For example If we wanted to use pipeline matmul_id_subgroup_f32_f32_aligned_m instead of the generic matmul_id_f32_f32_aligned_m pipeline for aligned_m only, we can't do this. All variants (_l, _m, _s, aligned_l, aligned_m, aligned_s) must be either subgroup based or generic with current CREATE_MM.

…verride

danielmayost · 2026-06-11T06:23:56Z

Have you seen this ggml-org#24408? Is this going to be added to the profits you're going to get there?

rillomas · 2026-06-11T07:55:58Z

Have you seen this ggml-org#24408? Is this going to be added to the profits you're going to get there?

I haven't tested with both so hard to say. Since ARL-H will get coopmat enabled the benefits on my changes (which are for non-coopmat kernels) may not add-up.

rillomas and others added 30 commits November 18, 2025 12:46

Adding default sub group size for Intel GPU

77f033b

Changing block size to match non-default subgroup size for Intel

0edb835

Fix validation error for coopmat environment

1f18959

Experimenting with subgroup requirements

56bf4bd

Changed to specify explicit subgroup size

29a1da9

Merge branch 'ggml-org:master' into set-default-subgroup-for-intel

7c3e2df

Changed so we only force subgroup size on Intel

76613be

Merge branch 'ggml-org:master' into set-default-subgroup-for-intel

88025bd

Merge branch 'master' into set-default-subgroup-for-intel

4a796af

experimenting subgroup change for specific kernels only

710f848

WIP to update subgroup size per kernel

36b976f

Merge branch 'ggml-org:master' into set-default-subgroup-for-intel

565557c

Merge branch 'master' into set-default-subgroup-for-intel

09e2100

fixed compile error

60893ad

experimenting specialization constant override

7d2d14f

experimenting specialization constant override

844c2e9

refactored matrix dimension

edccd26

refactored parameter override

669de9a

check if valid subgroup size is given

2a31eb1

adding specialization constant replacement

8783ed4

Revert "refactored matrix dimension"

f23e4b9

This reverts commit edccd26.

revert dynamic gpu_pipeline_configs init

377b006

experimenting blanket subgroup size change

2460f54

Fixed mismatch in MULMAT when subgroup is 16

7e05215

was failing on MUL_MAT(type_a=q4_0,type_b=f32,m=1,n=2048,k=8192,bs=[1,1],nr=[1,1],per=[0,1,2,3],k_v=0,o=1)

Only apply subgroup size change to M size kernels

fe8a3db

Merge branch 'master' into set-default-subgroup-for-intel

ed1c99f

Merge branch 'master' into set-default-subgroup-for-intel

3fda042

Fix compile error

6d50198

Merge remote-tracking branch 'origin/master' into set-default-subgrou…

b5249e9

…p-for-intel

workaround unit test failure for TOP_K

04b7af9

rillomas mentioned this pull request May 13, 2026

vulkan: Change default subgroup/block size for Intel GPU ggml-org/llama.cpp#17374

Draft

rillomas added 3 commits May 12, 2026 23:44

Merge remote-tracking branch 'origin/master' into set-default-subgrou…

f2b707c

…p-for-intel

fix compile error

8633379

fix validation error

201e69b

Merge branch 'set-default-subgroup-for-intel' into subgroup-8-for-old…

a44fc6c

…er-gpus

rillomas added 2 commits May 25, 2026 23:29

Merge remote-tracking branch 'origin/master' into set-default-subgrou…

9f79b58

…p-for-intel

Merge branch 'set-default-subgroup-for-intel' into subgroup-8-for-old…

ac70a70

…er-gpus

rillomas added 6 commits May 26, 2026 01:13

Experimenting fix for MUL_MAT_ID mismatch

2df11d7

applying changes to some mul_mat_id variants

ea5fb38

Experimenting mul_mat_vec specific configs

255eb10

Remove unneeded conversion function

4b4f1d5

rename

fe05293

Adjusting for MUL_MAT_ID kernels

f2cf16d

rillomas added 3 commits June 2, 2026 21:42

Stop forcing subgroup size when 0 is specified

9a255ef

Prefer to use subgroup 16 when no override is given

f278de9

reverted unneeded change

e8eeb03

rillomas force-pushed the subgroup-8-for-older-gpus branch from 7f6025f to e8eeb03 Compare June 3, 2026 08:44

reverted subgroup16 flags

37b9637

rillomas added 3 commits June 5, 2026 00:44

Fixed kernel selection

dc56855

non-subgroup kernel was faster on Subgroup 8

Fixed perf issue

54e6ed1

Experimenting subgroup/base kernel selection per variant

b5b1ea9

MMQ_ID can now select between subgroup or generic based on subgroup o…

4f01c37

…verride

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Experiment Subgroup 8 for older gpus#14

Experiment Subgroup 8 for older gpus#14
rillomas wants to merge 64 commits into
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subgroup-8-for-older-gpus

rillomas commented May 12, 2026 •

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rillomas commented May 12, 2026 •

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rillomas commented May 26, 2026 •

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rillomas commented Jun 3, 2026 •

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rillomas commented Jun 4, 2026 •

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rillomas commented Jun 8, 2026 •

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