Feature: Clearing Charge/Discharge Slots When Disabled#3889
Open
CraigCallender wants to merge 2 commits intospringfall2008:mainfrom
Open
Feature: Clearing Charge/Discharge Slots When Disabled#3889CraigCallender wants to merge 2 commits intospringfall2008:mainfrom
CraigCallender wants to merge 2 commits intospringfall2008:mainfrom
Conversation
…ilure on solis fb00 firmware if times overlap (even with disabled slots).
Contributor
There was a problem hiding this comment.
Pull request overview
Adds a per-inverter capability to proactively clear timed charge/discharge slot registers (times + current) when disabling schedules, addressing Solax Modbus FB00 overlap-validation failures caused by stale slot values.
Changes:
- Introduces
clear_slot_on_disableinverter capability (enabled forGS_fb00) and wires it intoInverterinitialization. - Adds
Inverter.clear_timed_slot_values(direction)and invokes it after disabling charge/discharge schedules. - Updates documentation and extends inverter tests to verify slot values are cleared on disable.
Reviewed changes
Copilot reviewed 4 out of 4 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| docs/inverter-setup.md | Documents the new clear_slot_on_disable capability and its intended scope/default. |
| apps/predbat/config.py | Enables clear_slot_on_disable for GS_fb00 inverter type definition. |
| apps/predbat/inverter.py | Adds slot-clearing logic and calls it from charge/discharge disable paths. |
| apps/predbat/tests/test_inverter.py | Adds coverage to ensure disable paths clear times/minutes/current back to zero. |
| even when a slot is disabled. Does nothing if inv_clear_slot_on_disable is False. | ||
| """ | ||
| if not self.inv_clear_slot_on_disable: | ||
| self.log(f"Inverter {self.id} clear_timed_slot_values: skipped (clear_slot_on_disable not set for this inverter type)") |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Fix: Clear Stale Slot Times When Disabling Charge/Discharge Windows (Solax Modbus FB00)
Similar to #3787 but for inverters using the Solax Modbus Integration (I've recently switched over to this).
Problem
When Predbat controls a Solax Modbus inverter (GS_fb00 firmware) via Home Assistant entities, disabling a timed charge or discharge window can leave stale time and current values in the inverter's registers. On the next enable cycle, when Predbat writes a new time window, the inverter's overlap validation can reject the write because it sees the stale times from the previous disable as conflicting with the new active slot, even though the slot was supposedly disabled.
This manifests as silent write failures where the inverter silently rejects the command, leaving Predbat unaware that the new window was not applied.
Changes
config.py— Newclear_slot_on_disablecapability flagAdded a new per-inverter-type capability flag
"clear_slot_on_disable"(defaults toFalsefor all types):GS_fb00(Ginlong Solis FB00 firmware):TrueFalse(unchanged behavior)This flag is loaded in
Inverter.__init__asself.inv_clear_slot_on_disable.inverter.py— Clear slot values on disableNew
clear_timed_slot_values(direction)methodClears all timed slot values (times and current) for a charge or discharge direction. The method:
inv_clear_slot_on_disableisFalse(no-op for inverters that don't need this)."H M","H:M-H:M", or other) and logs it.00:00:00(or0) to all time and minute entities, and0to the timed current entity.record_status()if any writes fail.Integration into disable paths
The method is called unconditionally after disabling:
adjust_force_export(force_export=False, ...)— callsclear_timed_slot_values("discharge")after turning off the discharge enable switch.disable_charge_window()— callsclear_timed_slot_values("charge")after turning off the charge enable switch (wheninv_has_charge_enable_timeisTrue).The guard for
inv_clear_slot_on_disableis inside the method, so call sites are simple and don't need to check the flag.docs/inverter-setup.md— Documentation updateAdded
clear_slot_on_disableto the custom inverter settings reference section, documenting:Falsefor all other inverter types.tests/test_inverter.py— New teststest_disable_charge_window_clears_slot_values_hm— verifies that disabling a charge window clears H M format time entities (hour/minute numbers and time.* entities) back to0or00:00:00, and resets timed charge current to0.test_disable_discharge_clears_slot_values_time_entities— verifies that disabling a discharge window clears time.* entities to00:00:00and resets timed discharge current to0.Both tests set
inv_clear_slot_on_disable = Trueto enable the clearing behavior and validate that the slot values are actually written.Testing
All existing inverter tests pass. New tests added to validate:
False