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Phase 3: tiny-tpu backend (Tile IR, tiling, .ttpu.json, real-RTL executor) - #3

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deaneeth merged 1 commit into
feat/phase-2-graph-passesfrom
feat/phase-3-tpu-backend
Oct 26, 2026
Merged

deaneeth merged 1 commit into
feat/phase-2-graph-passesfrom
feat/phase-3-tpu-backend

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Stacked on feat/phase-2-graph-passes. Merge the stack in order, starting from the bottom PR.

Commits in this PR:

  • Phase 3: tiny-tpu backend (Tile IR, tiling, .ttpu.json, real-RTL executor)

…utor)

Lower the legalized Graph IR to a Tile IR schedule of 4x4 chip passes plus
host accumulation, with bias/relu epilogues riding on the last accumulation
of each output tile. Add the skip-zero-passes tile pass, a static cost model,
the versioned .ttpu.json format with a JSON Schema and spec, an independent
reference interpreter that reads the JSON, and the single JS executor that
runs whole programs on the Verilated tiny-tpu RTL (host work is counted
separately from chip passes). `tinyc --target tpu` gains --emit tile|ttpu,
--run (real chip, seeded inputs, measured vs estimated cycles) and --stats.

Tests: lowering and verifier, tile passes, schema validation, every example
bit-exact on the real RTL with measured cycles equal to the estimate, pinned
cost numbers, and Hypothesis properties using a TPU-targeted generator
(multi-tile shapes, constants with zero blocks, every epilogue form).

Also fixes a pass-pipeline bug Hypothesis found: one canonicalize/cse sweep
left commutative adds in non-canonical order, so the pipeline was not
idempotent. The simplifications now run as a Fixpoint group in the pass
manager, with a regression test on the shrunk program.
@deaneeth
deaneeth merged commit 42bf267 into feat/phase-2-graph-passes Oct 26, 2026
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