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quartus2

Here are 39 public repositories matching this topic...

1075224835 / MyDigitalClock

2019年UPC应用物理专业《数字电子技术课程设计》任务内容：数字时钟设计

verilog upc verilog-hdl quartus digitalclock quartus2

Updated Jul 2, 2019
Verilog

tocache / Altera-Cyclone-II-FPGA

Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II

fpga vhdl altera vhdl-modules quartus vhdl-code vhdl-examples quartus2

Updated Jun 10, 2024
C

NeilNie / LC-3

Verilog Implementation of the LC-3 Processor. DA CS 603

verilog quartus lc-3 quartus2

Updated Mar 6, 2019
HTML

topofkeks / arilla

Arilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.

riscv computer-architecture paint-application risc-v vga-controller quartus2 de0-board ps2-mouse

Updated Sep 7, 2021
VHDL

DavidRosero / FPGAWorldCodes

Ejemplos de codigo con implementación en hardware para la tarjeta Cyclone IV lenguaje VHDL

fpga cyclone-iv vhdl-code quartus2

Updated Aug 24, 2025
VHDL

Shellyda / pokemon-fpga-game-ihs-project

Lightweight adventure game inspired by the classic Pokémon series, adapted to run on the DE2i-150 FPGA board.

pokemon real-time cpp hardware driver game-development raylib software drivers fgpa pokemon-game simple-project hardware-software quartus2 peripherals-identification de2i150-board

Updated Aug 14, 2025
Verilog

Chrisdeleon91 / Altera-DE1-VGA-Interface

Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.

fsm vhdl intel finite-state-machine quartus-prime vga-driver vga-controller altera-fpga vhdl-coursework quartus2 altera-de1

Updated Feb 7, 2023
VHDL

pa-tiq / DE0_FIR_Filter

FIR filter for Altera DE0 EP3C16F484C6N Created on top of SURF VHDL FIR Filter

vhdl quartus2

Updated Dec 6, 2020
VHDL

LoicKonan / Logic-Design

Logic Design.

vhdl boolean-expression logic-gates boolean-algebra quartus2

Updated Apr 16, 2022
VHDL

furkankayar / DEUARC

DEUARC RISC computer design in Quartus II 13.0

processor-architecture risc quartus2

Updated Feb 23, 2020
VHDL

joonicks / BizzasCPU

Bizzas CPU design

fpga quartus 8-bit-cpu quartus2 cpu-design

Updated Oct 31, 2021
C

errray / fpga-spaceship

This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.

altera de1-soc verilog-project quartus2 fpga-programming

Updated Aug 28, 2024
Verilog

Everloom-129 / ECE385-Digital-Systems-Lab

The goal of ECE 385 course is to teach students to design, build, and test/debug a digital system, which can be a 16-bit microprocessor, a dedicated logic core, or a system-on-a-chip (SoC) platform

systemverilog system-programming system-on-chip quartus2 ece385

Updated May 28, 2024
Verilog

jimfangx / DE2-70-Bringup

Assorted Verilog that brings up different elements (VGA, Ethernet, Switches, LED, LCD, etc.) of the terasIC DE2-70 Development Board.

fpga verilog ethernet altera modelsim vga nios2 vga-controller quartus2 terasic de2-70

Updated Jun 26, 2024
C

jrg94 / EECS301

CWRU's Logic Lab

fpga verilog quartus2

Updated Aug 18, 2018
Verilog

kvasi34 / aueb_processor

A 16 bit processor, following the RISC architecture. Made with Quartus and VHDL.

processor vhdl alu 16-bit quartus risc-processor processor-design quartus2

Updated Jun 22, 2022
HTML

rusito-23 / arki

Quartus II Pipelined Processor

pipeline-processor system-verilog quartus2

Updated Nov 14, 2019
SystemVerilog

AtlasFPGA / PINOUT_ATLAS_CYC1000

Subida del fichero TCL asociado al pineado de la placa CYC1000, Con sus múltiples variantes recogidas en un fichero de texto.

tcl openhardware quartus2 cyc1000 pinout-map atlasfpga

Updated Dec 11, 2023

LukaSimovic / Catch-the-square-FPGA

The player needs to click on the square with a computer mouse before it disappears. The score is shown on the seven-segment FPGA board display.

fpga vhdl quartus2

Updated Oct 7, 2021
VHDL

MoeeinAali / CE323-CA

Solutions to Dr. Arshadi's CE323: Computer Architecture Course (Sharif University of Technology - Spring 2024)

architecture logic circuit proteus quartus quartus2

Updated Oct 3, 2025
TeX

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