fix(core): populate pcb_via.layers with all spanned layers

[gwhthompson]

Summary

• pcb_via.layers listed only [fromLayer, toLayer] (the // TODO calculate layers inbetween top and bottom using layer count in Via._getLayers), so on 4-layer boards a drilled via "skipped" the inner layers it physically crosses. Anything that reads layers to decide per-layer interaction gets this wrong — most visibly @tscircuit/copper-pour-solver, whose via.layers.includes(layer) test makes inner-plane pours flood solid over foreign-net via barrels (no antipad → every through-via shorts to the inner plane in the exported gerbers; invisible to DRC because the pour is resolved after checks).
• pcb_via.layers now lists every copper layer between fromLayer and toLayer (inclusive, in from→to order), derived from the subcircuit layer count via a new getViaSpanLayers util. Both <via> and the imported-circuit-json PcbVia path use it; an explicit layers prop on PcbVia still wins, and 2-layer boards are unchanged ([top, bottom]).

Testing

• Full bun test suite green (no existing test depends on the 2-entry shape); bunx tsc --noEmit clean.
• New tests/components/primitive-components/via-layer-span.test.tsx:
  • 4-layer top→bottom via → ["top", "inner1", "inner2", "bottom"] (fails before this change: ["top", "bottom"])
  • 4-layer top→inner2 via → ["top", "inner1", "inner2"]
  • 2-layer via unchanged → ["top", "bottom"]
• Existing via snapshot tests pass unchanged; port initialization is untouched (the span is computed at pcb-primitive render, when the board's layer count is known — before tree attachment the util falls back to [fromLayer, toLayer]).

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Project	Deployment	Actions	Updated (UTC)
tscircuit-core-benchmarks	Ready	Preview, Comment	Jun 10, 2026 4:02am