Add MiniMax M3 MI355X optimization blog - #313
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Co-authored-by: vllmellm <vllm.ellm@embeddedllm.com> Co-authored-by: Hongxia Yang <hongxia.yang@amd.com> Co-authored-by: Jun Kang Chow <junkangchow@gmail.com> Signed-off-by: Tan Pin Siang <tanpinsiang@gmail.com>
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Summary
Adds a follow-up blog post on optimizing MiniMax M3 serving with vLLM on AMD Instinct MI355X.
the post follows the bottleneck as it moves, from rank-local GEMM shapes and repeated MoE work to sparse-attention data movement, collective dispatch, P/D topology, and AgentX KV-cache capacity.