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fix(working-memory): reserve VAE working memory per dtype and allocator - #9898
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VAE estimators return a WorkingMemoryEstimate built from fitted and analytic terms; model_on_device accepts it as working_memory=. The AutoencoderKL coefficients and their measured points move to backend/working_memory/data, checked by a data test; reservations are unchanged.
VAE estimators price a measured slope and base per conv backend, allocator and dtype instead of scaling one bf16 constant by element size; CogView4 gets its own lines. SD/SDXL nodes and their estimate share one run-dtype rule; on ROCm Windows an SDXL fp32 1024² decode reserves 6.2 instead of 14.6 GB and the UNet stays resident.
A lower second reading at a measured size no longer tilts a fitted line, and points that include cast weight growth no longer fit one; two shipped lines move by under 1 %.
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# Conflicts: # invokeai/backend/util/vae_working_memory.py # tests/app/invocations/test_flux2_working_memory.py
# Conflicts: # invokeai/backend/util/vae_working_memory.py
This was referenced Oct 18, 2026
# Conflicts: # docs/src/content/docs/development/Architecture/model-manager.mdx # invokeai/backend/util/vae_working_memory.py # invokeai/backend/working_memory/coefficients.py # invokeai/backend/working_memory/data/vae.json # invokeai/backend/working_memory/platform.py # scripts/calibrate_flux2_working_memory.py # tests/app/invocations/test_flux2_working_memory.py # tests/app/invocations/test_vae_working_memory_backend.py # tests/app/invocations/test_z_image_tiled_decode.py # tests/backend/util/test_rocm_sdpa_head_dim_guard.py # tests/backend/working_memory/test_shipped_coefficients.py
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Summary
VAE working memory was priced as
pixels × element size × k, with one k per convolution backend fitted on bf16 decodes. Measurements show three problems with that:On an RX 9060 XT this evicted the SDXL UNet on every 1024² fp32 image.
The five AutoencoderKL-family estimators now price a measured slope and base per (conv backend, allocator, dtype). The values come from a shipped upper-envelope fit (+5 %) over the measured points, and a test checks they reproduce from the points.
cudaMallocAsync, SDXL fp32 decodeexpandable_segments:False, FLUX bf16 decodefp32=Falsedecode runs fp16 whatever the loaded dtype.Related Issues / Discussions
Builds on #9896. Measurement report and runs: SD/SDXL VAE decode measurements (both cards, fp16/bf16/fp32, native/
cudaMallocAsync, isolated and in real generations).QA Instructions
Measurements:
cudaMallocAsync) and the RX 9060 XT (expandable and native).working_memory/data/vae.json.A/B on the RX 9060 XT (SDXL txt2img, 25 steps, E2E tool; before =
upstream/main, after = this branch):The two runs were not interleaved.
Tests: affected suites 4945 passed, 0 failed. Each changed file also passes alone.
Review
Resolved findings
block_out_channels[128, 512, 1024, 1024], 3 layers per block) had been borrowing the family's lines. It is now measured and has its own lines.ValueError.Remaining limits
Compatibility / Rollout
Checklist
What's Newcopy (if doing a release after this PR)Need help on this PR? Tag
@codesmith-botwith what you need.