Vulkan: halve the pointwise conv spatial tile

[msluszniak]

Summary

conv2d_pw_tiled is generated only at TILE_M=4. TILE_M=2 is faster on every model and both GPU vendors I measured, so this changes the generated variant and the matching global workgroup size. Nothing else about the shader, the tiling logic or the math changes.

Measurements

Arms interleaved within one session, per-dispatch GPU timestamps from the query pool, median of interleaved rounds. Mali-G76 is a Galaxy S10+, Adreno 840 a Galaxy S26 Ultra.

model	device	conv2d_pw	whole graph GPU
lraspp-mobilenet-v3-large fp16 @520	Mali-G76	71.5 -> 43.8 ms (1.63x)	99.3 -> 71.7 ms (1.38x)
selfie-segmentation fp16 @256	Mali-G76	4.21 -> 2.32 ms (1.82x)	8.46 -> 6.54 ms (1.29x)
lraspp-mobilenet-v3-large fp16 @520	Adreno 840	5.35 -> 5.00 ms (1.07x)	10.95 -> 10.59 ms (1.03x)
selfie-segmentation fp16 @256	Adreno 840	0.530 -> 0.435 ms (1.22x)	1.050 -> 0.956 ms (1.10x)
PP-OCRv6 fp16	Adreno 840	23.66 -> 23.72 ms (1.00x)	57.5 -> 58.2 ms (0.99x)

No regression anywhere; the Mali gain is the large one.

Why 2 and not something else

The tile size was swept, not guessed. On Mali-G76 with lraspp, relative to the current TILE_M=4:

variant	conv2d_pw	vs current
TILE_M=2	43.8 ms	1.63x
TILE_M=1	73.7 ms	0.97x
TILE_M=8	287.6 ms	0.24x
TILE_N4=2	436.1 ms	0.16x
TILE_N4=4	1136.8 ms	0.06x

2 is a genuine optimum: 1 gives each invocation too little work, and anything wider falls off a cliff. The magnitude of the wide variants (4x to 16x, not tens of percent) points at register spilling rather than occupancy, and it reproduces in both dispatch shapes I have - selfie is small-N4/large-M, lraspp is large-N4/small-M.

Note TILE_M4 is left at 1. It is declared in this shader's parameter list but none of the includes conv2d_pw_tiled.glsl actually pulls in reference it, so it has no effect here.

Correctness

Output is bit identical to the current shader at every tile size tested, on both devices, max |diff| = 0.0.

cc @SS-JIA @manuelcandales @digantdesai @cbilgin

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