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[executorch][cuda] Run INT4 decode linears on autotuned QuantizedGemmFamily Triton kernels and delete the int4_plain_mm C shim - #23513
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Stack from ghstack (oldest at bottom):
Decode-sized (M <= 4) INT4 linears (
CudaCoalescedInt4Tensor) move ontoQuantizedGemmFamily(parent diff) astriton::int4_quantized_gemm_m{1,2,3,4}. This removes theint4_plain_mmC shim everywhere.Shared pieces,
triton/kernels/quantized_gemm_utils.py. These are written once for INT4/5/6/8 and moved here from the INT4 kernels:split_k_for, the device's-SM-count rule, now rounded to a power of two under the workspace bound;autotune_configs(implementations): implementations x rows per CTA {1, 2, 4, 8} (= num_warps) x pipeline stages s in {1, 2, 3} (PIPELINE_STAGES=num_stages= s);prune_by_main_loop_tripsforprune_configs_by(drops stage counts above the main loop's trip count);quantized_gemm_family.launch_split_k_gemmis the shared launch skeleton: output, bucket-sized split-K workspace, grid, and reduce.INT4,
triton/kernels/int4_quantized_gemm.py. It keeps only the INT4 kernels and rules._unsupported_reasoncovers every rule the old_validate_inputsraised on, plus static K, K % 256, gs == 32, the M range (static M == bucket, or a dynamic M provably in [1, bucket]), and CUDA-or-fake. The family derivessupportsandvalidatefrom it; every op validates before launching.triton.autotunecovers the generic space over three implementations: the generic row-blocked kernel, the explicit per-row-accumulator kernel with the bucket's rows, and the next-larger explicit kernel. The extra row is masked, but its code is faster at M = 3 with large K. Configs are pruned by trip count (AOTInductor honorsprune_configs_byon user kernels).Dispatch,
quantize_op_dispatch/int4_dispatch.py. It uses the sharedquantized_linearandchunked_dequant_linear; INT4 provides only its single-chunk dequantization. Unsupported inputs fall back to dequant +F.linearand never raise. Theint4_plain_mmschema and its Meta/CUDA impls are removed.C shim removal (fbcode + xplat):
runtime/shims/int4_plain_mm.{h,cu,cuh}, its gtest and its benchmark;runtime/targets.bzl,CMakeLists.txtand the shim tests'CMakeLists.txt;gen_plain_mm_test_vectors.py;custom_ops_to_c_shimsentries incuda_backend.py, and thetest_sort_shimexpectations;_weight_int4pack_mmis a different op and is untouched.aoti_cuda_shims.lib(Windows) is left as is; its extra symbol is unreferenced.Op level (A100; full sequence = activation quantization + GEMM (+ reduce); the shim built from the pre-diff sources; each case runs the best config of the pruned space, then shim and Triton alternate for 7 rounds and medians are compared). All 16 INT4 linear shapes of the gemma4_31b, muse-glimmer and dflash GGUFs, M = 1..4, plus the 4-row bucket at a dynamic M = 2, 3:
No device-agnostic split-K rule closes the remaining cases: a sweep of split rules shows only a per-shape split would. They are left as is; the model A/B below is the check.
SEE_AB_TABLE
Differential Revision: D123569750