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Stack from ghstack (oldest at bottom):
Decode-sized (M <= 4) weight-only INT8 linears (torchao
IntxUnpackedToInt8Tensor,target_dtypeint8, no activation quantization) move ontoQuantizedGemmFamilyastriton::int8_quantized_gemm_m{1,2,3,4}, like INT4 and INT6 below. This removes theint8_plain_mmC shim everywhere.Kernels,
triton/kernels/int8_quantized_gemm.py. W8A8 DP4A, generated with KernelAgent.natural_orderoption of the shared quantizer inquantized_gemm_utils.py, the only shared change.(zero + 128) * x_sum._unsupported_reasonrules: bf16 activation; int8 qdata/zero; bf16 scale; group size a power of two >= 32; static K % 256 == 0; consistent static shapes; contiguous; 4-byte-aligned qdata; same device, CUDA or fake; the shared M rule. K that is a multiple of 32 but not of 256 (which the shim served) now takes the dequant fallback.Dispatch,
quantize_op_dispatch/int8_dispatch.py. The type routing is kept: otherIntxUnpackedToInt8Tensorconfigurations use their own dequantize. The weight-only INT8 path uses the sharedquantized_linearandchunked_dequant_linear. Unsupported inputs fall back without raising. A keywordbias=is now honored (it was dropped before). Theint8_plain_mmschema and its impls are removed.C shim removal (fbcode + xplat):
runtime/shims/int8_plain_mm.{h,cu,cuh};runtime/targets.bzlandCMakeLists.txt;custom_ops_to_c_shimsentries incuda_backend.py, and thetest_sort_shimexpectations;INT8 had no gtest or benchmark.
Op level (A100; full sequence = activation quantization + GEMM (+ reduce); the shim built from the pre-diff sources). No INT8 model is on disk, so these are representative Llama-style decode shapes (N x K): q_proj/o_proj 4096x4096, kv_proj 1024x4096, gate_up 14336x4096, down 4096x14336, lm_head 128256x4096, gs 32, plus gs 128 for gate_up and down. Each is run at M = 1..4 and with the 4-row bucket at a dynamic M = 2, 3, for 48 cases.
Model A/B: not run. There is no INT8 model on disk; this diff is validated at op level only.
Differential Revision: D123666321