FPGA

Workflow runs for FPGA

• Merge pull request #7 from deaneeth/feat/phase-10-fpga

  completed successfully:
  FPGA#3:Commit050bdfbpushedbydeaneeth
  main

  Oct 26, 202613m 20s
  More actions for workflow run 3

• Phase 10: FPGA (ECP5) synthesis and UART wrapper

  completed successfully:
  FPGA#2:Pull request#7synchronizebydeaneeth
  feat/phase-10-fpga

  Oct 26, 202616m 11s
  More actions for workflow run 2

• Phase 10: FPGA (ECP5) synthesis and UART wrapper

  failed:
  FPGA#1:Pull request#7openedbydeaneeth
  feat/phase-10-fpga

  Oct 26, 202610s
  More actions for workflow run 1